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Searched refs:pclk_dbg_div (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/rockchip/
A Dclk_rk3399.c436 u32 pclk_dbg_div; in rk3399_configure_cpu_l() local
446 pclk_dbg_div = LPLL_HZ / PCLK_DBG_L_HZ - 1; in rk3399_configure_cpu_l()
447 assert((pclk_dbg_div + 1) * PCLK_DBG_L_HZ == LPLL_HZ && in rk3399_configure_cpu_l()
448 pclk_dbg_div < 0x1f); in rk3399_configure_cpu_l()
463 pclk_dbg_div << PCLK_DBG_L_DIV_SHIFT | in rk3399_configure_cpu_l()
471 u32 pclk_dbg_div; in rk3399_configure_cpu_b() local
481 pclk_dbg_div = BPLL_HZ / PCLK_DBG_B_HZ - 1; in rk3399_configure_cpu_b()
482 assert((pclk_dbg_div + 1) * PCLK_DBG_B_HZ == BPLL_HZ && in rk3399_configure_cpu_b()
483 pclk_dbg_div < 0x1f); in rk3399_configure_cpu_b()
498 pclk_dbg_div << PCLK_DBG_B_DIV_SHIFT | in rk3399_configure_cpu_b()
A Dclk_rk3328.c316 u32 pclk_dbg_div; in rk3328_configure_cpu() local
322 pclk_dbg_div = APLL_HZ / PCLK_DBG_HZ / (clk_core_div + 1) - 1; in rk3328_configure_cpu()
331 pclk_dbg_div << PCLK_DBG_DIV_SHIFT | in rk3328_configure_cpu()

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