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Searched refs:per_pll_gpiodiv (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-socfpga/include/mach/
A Dclock_manager_s10.h50 u32 per_pll_gpiodiv; member
/u-boot/drivers/clk/altera/
A Dclk-agilex.h40 u32 per_pll_gpiodiv; member
A Dclk-agilex.c293 CM_REG_WRITEL(plat, cfg->per_pll_gpiodiv, CLKMGR_PERPLL_GPIODIV); in clk_basic_init()
/u-boot/arch/arm/mach-socfpga/
A Dclock_manager_s10.c105 writel(cfg->per_pll_gpiodiv, in cm_basic_init()

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