Searched refs:pex (Results 1 – 18 of 18) sorted by relevance
| /u-boot/arch/powerpc/cpu/mpc83xx/ |
| A D | pcie.c | 58 pex83xx_t *pex = &immr->pciexp[pcie_priv->index]; in mpc83xx_pcie_remap_cfg() local
217 pex83xx_t *pex = &immr->pciexp[bus]; in mpc83xx_pcie_init_bus() local
228 out_le32(&pex->bridge.pex_csb_ctrl, in mpc83xx_pcie_init_bus()
229 in_le32(&pex->bridge.pex_csb_ctrl) | PEX_CSB_CTRL_OBPIOE | in mpc83xx_pcie_init_bus()
237 out_win = &pex->bridge.pex_outbound_win[0]; in mpc83xx_pcie_init_bus()
250 out_win = &pex->bridge.pex_outbound_win[i + 1]; in mpc83xx_pcie_init_bus()
269 in_win = &pex->bridge.pex_inbound_win[i]; in mpc83xx_pcie_init_bus()
295 in_win = &pex->bridge.pex_inbound_win[i]; in mpc83xx_pcie_init_bus()
303 out_le32(&pex->bridge.pex_int_axi_misc_enb, in mpc83xx_pcie_init_bus()
304 in_le32(&pex->bridge.pex_int_axi_misc_enb) | 0x1E0); in mpc83xx_pcie_init_bus()
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| /u-boot/arch/arm/mach-mvebu/serdes/axp/ |
| A D | board_env_spec.h | 164 #define SCR_PEX_ENA_OFFS(pex) ((pex) & 0x3) argument
165 #define SCR_PEX_ENA_MASK(pex) (1 << pex) argument
170 #define SCR_PEX_4BY1_OFFS(pex) ((pex) + 7) argument
171 #define SCR_PEX_4BY1_MASK(pex) (1 << SCR_PEX_4BY1_OFFS(pex)) argument
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| /u-boot/doc/device-tree-bindings/misc/misc/ |
| A D | fsl,mpc83xx-serdes.txt | 11 "sata", "pex", "pex-x2", "sgmii"
21 proto = "pex";
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| /u-boot/arch/arm/dts/ |
| A D | tegra20-trimslice.dts | 36 avdd-pex-supply = <&pci_vdd_reg>;
37 vdd-pex-supply = <&pci_vdd_reg>;
38 avdd-pex-pll-supply = <&pci_vdd_reg>;
40 vddio-pex-clk-supply = <&pci_clk_reg>;
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| A D | tegra124-cei-tk1-som.dts | 35 avddio-pex-supply = <&vdd_1v05_run>;
36 dvddio-pex-supply = <&vdd_1v05_run>;
37 avdd-pex-pll-supply = <&vdd_1v05_run>;
38 hvdd-pex-supply = <&vdd_3v3_lp0>;
39 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
40 vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
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| A D | tegra124-jetson-tk1.dts | 35 avddio-pex-supply = <&vdd_1v05_run>;
36 dvddio-pex-supply = <&vdd_1v05_run>;
37 avdd-pex-pll-supply = <&vdd_1v05_run>;
38 hvdd-pex-supply = <&vdd_3v3_lp0>;
39 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
40 vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
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| A D | tegra30-apalis.dts | 41 avdd-pex-pll-supply = <&vdd2_reg>;
43 vddio-pex-ctl-supply = <&sys_3v3_reg>;
44 hvdd-pex-supply = <&sys_3v3_reg>;
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| A D | tegra30-beaver.dts | 38 avdd-pex-pll-supply = <&ldo1_reg>;
40 vddio-pex-ctl-supply = <&sys_3v3_reg>;
41 hvdd-pex-supply = <&sys_3v3_pexs_reg>;
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| A D | tegra30-cardhu.dts | 36 avdd-pex-pll-supply = <&ldo1_reg>;
37 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
38 vddio-pex-ctl-supply = <&sys_3v3_reg>;
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| A D | tegra20-harmony.dts | 605 avdd-pex-supply = <&pci_vdd_reg>;
606 vdd-pex-supply = <&pci_vdd_reg>;
607 avdd-pex-pll-supply = <&pci_vdd_reg>;
609 vddio-pex-clk-supply = <&pci_clk_reg>;
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| A D | tegra186.dtsi | 249 clock-names = "pex", "afi";
253 reset-names = "pex", "afi", "pcie_x";
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| A D | tegra124-apalis.dts | 82 avddio-pex-supply = <&vdd_1v05>;
83 avdd-pex-pll-supply = <&vdd_1v05>;
85 dvddio-pex-supply = <&vdd_1v05>;
86 hvdd-pex-pll-e-supply = <®_3v3>;
87 hvdd-pex-supply = <®_3v3>;
88 vddio-pex-ctl-supply = <®_3v3>;
1923 avddio-pex-supply = <&vdd_1v05>;
1928 dvddio-pex-supply = <&vdd_1v05>;
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| A D | tegra20.dtsi | 611 clock-names = "pex", "afi", "pll_e";
615 reset-names = "pex", "afi", "pcie_x";
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| A D | tegra30.dtsi | 43 clock-names = "pex", "afi", "pll_e", "cml";
47 reset-names = "pex", "afi", "pcie_x";
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| A D | tegra210.dtsi | 43 clock-names = "pex", "afi", "pll_e", "cml";
47 reset-names = "pex", "afi", "pcie_x";
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| A D | tegra124.dtsi | 46 clock-names = "pex", "afi", "pll_e", "cml";
50 reset-names = "pex", "afi", "pcie_x";
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| /u-boot/arch/powerpc/dts/gdsys/ |
| A D | gazerbeam-uboot.dtsi | 196 proto = "pex";
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| /u-boot/arch/powerpc/include/asm/ |
| A D | fsl_liodn.h | 105 SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
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