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Searched refs:pf (Results 1 – 25 of 34) sorted by relevance

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/u-boot/drivers/pci/
A Dpcie_layerscape_ep.c80 0 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
84 1 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
88 2 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
92 3 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
99 4 + pf * BAR_NUM, 0, phys); in ls_pcie_ep_setup_atu()
104 5 + pf * BAR_NUM, 1, phys); in ls_pcie_ep_setup_atu()
109 6 + pf * BAR_NUM, 2, phys); in ls_pcie_ep_setup_atu()
114 7 + pf * BAR_NUM, 4, phys); in ls_pcie_ep_setup_atu()
185 u32 pf, vf; in ls_pcie_setup_ep() local
192 for (pf = 0; pf < PCIE_PF_NUM; pf++) { in ls_pcie_setup_ep()
[all …]
A Dpcie_layerscape_gen4.c326 ccsr_writel(pcie, PAB_PEX_BAR_AMAP(pf, bar), val); in ls_pcie_g4_ep_inbound_win_set()
335 if ((!pcie->sriov_support && pf > LS_G4_PF0) || pf > LS_G4_PF1) in ls_pcie_g4_ep_setup_wins()
347 CONFIG_SYS_PCI_MEMORY_SIZE * pf, 0x0, in ls_pcie_g4_ep_setup_wins()
352 val |= pf; in ls_pcie_g4_ep_setup_wins()
360 u32 bar_pos = BAR_POS(bar, pf, vf_bar); in ls_pcie_g4_ep_enable_bar()
373 u32 bar_pos = BAR_POS(bar, pf, vf_bar); in ls_pcie_g4_ep_set_bar_size()
419 val += PCIE_VF_NUM * pf - pf; in ls_pcie_g4_set_sriov()
425 u32 pf, sriov; in ls_pcie_g4_setup_ep() local
438 pf = pcie->sriov_support ? PCIE_PF_NUM : 1; in ls_pcie_g4_setup_ep()
440 for (i = 0; i < pf; i++) { in ls_pcie_g4_setup_ep()
[all …]
A Dpcie_layerscape.h51 #define PCIE_ATU_FUNC_NUM(pf) ((pf) << 20) argument
85 #define PCIE_LCTRL0_PF(pf) ((pf) << 16) argument
87 #define PCIE_LCTRL0_VAL(pf, vf) (PCIE_LCTRL0_PF(pf) | \ argument
105 #define PCIE_MASK_OFFSET(flag, pf, off) ((flag) ? 0 : (0x1000 + (off) * (pf))) argument
185 void ls_pcie_atu_inbound_set(struct ls_pcie *pcie, u32 pf, u32 vf_flag,
A Dpcie_layerscape_gen4.h49 #define BAR_POS(bar, pf, vf_bar) \ argument
50 ((bar) + (pf) * PF_BAR_NUM + (vf_bar) * PCIE_PF_NUM * PF_BAR_NUM)
52 #define GPEX_SRIOV_INIT_VFS_TOTAL_VF(pf) (0x644 + (pf) * 4) argument
57 #define GPEX_SRIOV_VF_OFFSET_STRIDE(pf) (0x704 + (pf) * 4) argument
144 #define PAB_PEX_BAR_AMAP(pf, bar) \ argument
145 (0x1ba0 + 0x20 * (pf) + 4 * (bar))
147 #define PAB_EXT_PEX_BAR_AMAP(pf, bar) \ argument
148 (0x84a0 + 0x20 * (pf) + 4 * (bar))
A Dpcie_layerscape.c112 void ls_pcie_atu_inbound_set(struct ls_pcie *pcie, u32 pf, u32 vf_flag, in ls_pcie_atu_inbound_set() argument
118 dbi_writel(pcie, type | PCIE_ATU_FUNC_NUM(pf), PCIE_ATU_CR1); in ls_pcie_atu_inbound_set()
A Dpcie_fsl.c285 bool pf, u64 phys, u64 bus_addr, in fsl_pcie_setup_inbound_win() argument
310 if (pf) in fsl_pcie_setup_inbound_win()
/u-boot/drivers/pinctrl/mediatek/
A Dpinctrl-mtk-common.c142 *l = 32 - pf->bitpos; in mtk_hw_bits_part()
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
154 (value & pf->mask) << pf->bitpos); in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
167 l = (mtk_r32(dev, pf->offset) >> pf->bitpos) & (BIT(nbits_l) - 1); in mtk_hw_read_cross_field()
168 h = (mtk_r32(dev, pf->offset + pf->next)) & (BIT(nbits_h) - 1); in mtk_hw_read_cross_field()
183 if (!pf.next) in mtk_hw_set_value()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
185 (value & pf.mask) << pf.bitpos); in mtk_hw_set_value()
202 if (!pf.next) in mtk_hw_get_value()
[all …]
/u-boot/drivers/net/
A Dfsl_enetc.c38 #define IERB_PFMAC(pf, vf, n) (IERB_BASE + 0x8000 + (pf) * 0x100 + (vf) * 8 \ in enetc_set_ierb_primary_mac() argument
362 #define LS1028A_IERB_PSIPMAR0(pf, vf) (LS1028A_IERB_BASE + 0x8000 \ argument
363 + (pf) * 0x100 + (vf) * 8)
364 #define LS1028A_IERB_PSIPMAR1(pf, vf) (LS1028A_IERB_PSIPMAR0(pf, vf) + 4) argument
374 int pf; in enetc_ls1028a_write_hwaddr() local
379 pf = devfn_to_pf[devfn]; in enetc_ls1028a_write_hwaddr()
380 if (pf < 0) in enetc_ls1028a_write_hwaddr()
386 out_le32(LS1028A_IERB_PSIPMAR0(pf, 0), upper); in enetc_ls1028a_write_hwaddr()
387 out_le32(LS1028A_IERB_PSIPMAR1(pf, 0), lower); in enetc_ls1028a_write_hwaddr()
/u-boot/drivers/video/stm32/
A Dstm32_ltdc.c162 enum stm32_ltdc_pix_fmt pf; in stm32_ltdc_get_pixel_format() local
166 pf = PF_RGB565; in stm32_ltdc_get_pixel_format()
170 pf = PF_ARGB8888; in stm32_ltdc_get_pixel_format()
174 pf = PF_L8; in stm32_ltdc_get_pixel_format()
183 pf = PF_RGB565; in stm32_ltdc_get_pixel_format()
187 log_debug("%d bpp -> ltdc pf %d\n", VNBITS(l2bpp), pf); in stm32_ltdc_get_pixel_format()
189 return (u32)pf; in stm32_ltdc_get_pixel_format()
/u-boot/drivers/net/octeontx2/
A Drvu_af.c26 void rvu_get_lfid_for_pf(int pf, int *nixid, int *npaid) in rvu_get_lfid_for_pf() argument
35 pf_func.s.pf = pf; in rvu_get_lfid_for_pf()
A Drvu.h116 void rvu_get_lfid_for_pf(int pf, int *nixid, int *npaid);
A Dnix.c407 pf_func.s.pf = rvu->pfid; in nix_lf_alloc()
410 nix->pf = rvu->pfid; in nix_lf_alloc()
418 nix->lmac = nix_get_cgx_lmac(nix->pf); in nix_lf_alloc()
421 __func__, nix->pf); in nix_lf_alloc()
A Dnix.h209 int pf; member
/u-boot/arch/arm/dts/
A Dam335x-icev2-u-boot.dtsi22 xtal-load-pf = <0>;
A Dam57xx-idk-common-u-boot.dtsi21 xtal-load-pf = <0>;
A Dam437x-idk-evm-u-boot.dtsi32 xtal-load-pf = <0>;
A Dfsl-ls1088a.dtsi187 0x00 0x034c0000 0x0 0x40000 /* pf controls registers */
203 0x00 0x035c0000 0x0 0x40000 /* pf controls registers */
219 0x00 0x036c0000 0x0 0x40000 /* pf controls registers */
A Dfsl-ls1046a.dtsi288 0x00 0x034c0000 0x0 0x40000 /* pf controls registers */
315 0x00 0x035c0000 0x0 0x40000 /* pf controls registers */
343 0x00 0x036c0000 0x0 0x40000 /* pf controls registers */
A Dsunxi-libretech-all-h3-it.dtsi148 vcc-pf-supply = <&reg_vcc_io>;
A Dfsl-ls1012a.dtsi144 0x00 0x034c0000 0x0 0x40000 /* pf controls registers */
A Dls1021a.dtsi441 0x01570000 0x10000 /* pf controls registers */
456 0x01570000 0x10000 /* pf controls registers */
A Dfsl-ls1028a.dtsi98 0x00 0x034c0000 0x0 0x40000 /* pf controls registers */
114 0x00 0x035c0000 0x0 0x40000 /* pf controls registers */
/u-boot/doc/device-tree-bindings/clock/
A Dti,cdce9xx.txt25 - xtal-load-pf: Crystal load-capacitor value to fine-tune performance on a
43 xtal-load-pf = <5>;
/u-boot/drivers/net/octeontx/
A Dnicvf_main.c493 struct nicpf *pf; in nicvf_initialize() local
502 pf = dev_get_priv(pfdev); in nicvf_initialize()
505 nicvf->nicpf = pf; in nicvf_initialize()
531 bgx = NIC_GET_BGX_FROM_VF_LMAC_MAP(pf->vf_lmac_map[nicvf->vf_id]); in nicvf_initialize()
532 lmac = NIC_GET_LMAC_FROM_VF_LMAC_MAP(pf->vf_lmac_map[nicvf->vf_id]); in nicvf_initialize()
/u-boot/doc/
A DREADME.440-DDR-performance47 ttcp-t: 0.0user 0.1sys 0:00real 60% 0i+0d 0maxrss 0+2pf 3+1506csw
87 ttcp-t: 0.0user 0.0sys 0:00real 46% 0i+0d 0maxrss 0+2pf 120+1csw

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