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Searched refs:phy_id (Results 1 – 25 of 51) sorted by relevance

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/u-boot/drivers/net/
A Dbcm6368-eth.c125 int phy_id; member
141 int phy_id; member
150 int phy_id, int reg) in bcm6368_mdio_read() argument
157 (phy_id << MII_SC_PHYID_SHIFT) | in bcm6368_mdio_read()
239 port->phy_id, MII_BMSR); in bcm6368_eth_adjust_link()
262 port->phy_id, MII_ADVERTISE); in bcm6368_eth_adjust_link()
278 port->phy_id, MII_CTRL1000); in bcm6368_eth_adjust_link()
281 port->phy_id, MII_STAT1000); in bcm6368_eth_adjust_link()
464 if (priv->used_ports[i].phy_id == phy_id) in bcm6368_phy_is_external()
590 int phy_id; in bcm6368_eth_probe() local
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A Ddnet.c246 u16 phy_id, status, adv, lpa; in dnet_phy_init() local
254 phy_id = dnet_mdio_read(dnet, MII_PHYSID1); in dnet_phy_init()
255 if (phy_id != 0xffff) { in dnet_phy_init()
258 i, phy_id, in dnet_phy_init()
265 phy_id = dnet_mdio_read(dnet, MII_PHYSID1); in dnet_phy_init()
266 if (phy_id == 0xffff) { in dnet_phy_init()
A Dfec_mxc.c259 fec_mdio_write(eth, fec->phy_id, MII_DCOUNTER, 0x00FF); in miiphy_restart_aneg()
261 fec_mdio_write(eth, fec->phy_id, MII_BMCR, BMCR_RESET); in miiphy_restart_aneg()
265 fec_mdio_write(eth, fec->phy_id, MII_ADVERTISE, in miiphy_restart_aneg()
268 fec_mdio_write(eth, fec->phy_id, MII_BMCR, in miiphy_restart_aneg()
272 ret = fec->mii_postcall(fec->phy_id); in miiphy_restart_aneg()
294 status = fec_mdio_read(eth, fec->phy_id, MII_BMSR); in miiphy_wait_aneg()
564 speed = miiphy_speed(edev->name, fec->phy_id); in fec_open()
565 miiphy_duplex(edev->name, fec->phy_id); in fec_open()
1110 struct mii_dev *bus, int phy_id) in fec_probe()
1176 fec->phy_id = phy_id; in fec_probe()
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A Dns8382x.c252 static int mdio_read(struct eth_device *dev, int phy_id, int addr);
253 static void mdio_write(struct eth_device *dev, int phy_id, int addr, int value);
474 mdio_read(struct eth_device *dev, int phy_id, int addr) in mdio_read() argument
476 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | addr; in mdio_read()
501 mdio_write(struct eth_device *dev, int phy_id, int addr, int value) in mdio_write() argument
503 int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (addr << 18) | value; in mdio_write()
/u-boot/drivers/net/ti/
A Dcpsw_mdio.c75 static int cpsw_mdio_read(struct mii_dev *bus, int phy_id, in cpsw_mdio_read() argument
82 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK) in cpsw_mdio_read()
90 (phy_id << USERACCESS_PHY_ADDR_SHIFT)); in cpsw_mdio_read()
101 static int cpsw_mdio_write(struct mii_dev *bus, int phy_id, int dev_addr, in cpsw_mdio_write() argument
108 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK) in cpsw_mdio_write()
116 (phy_id << USERACCESS_PHY_ADDR_SHIFT) | in cpsw_mdio_write()
/u-boot/drivers/net/phy/
A Dcortina.c360 int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) in get_phy_id() argument
368 *phy_id = (phy_reg & 0xffff) << 16; in get_phy_id()
373 *phy_id |= (phy_reg & 0xffff); in get_phy_id()
375 if ((*phy_id == PHY_UID_CS4340) || (*phy_id == PHY_UID_CS4223)) in get_phy_id()
385 *phy_id = (phy_reg & 0xffff) << 16; in get_phy_id()
390 *phy_id |= (phy_reg & 0xffff); in get_phy_id()
A Dphy.c645 int phy_id = phydev->phy_id; in get_phy_driver() local
650 if ((drv->uid & drv->mask) == (phy_id & drv->mask)) in get_phy_driver()
659 u32 phy_id, bool is_c45, in phy_device_create() argument
688 dev->phy_id = phy_id; in phy_device_create()
727 *phy_id = (phy_reg & 0xffff) << 16; in get_phy_id()
735 *phy_id |= (phy_reg & 0xffff); in get_phy_id()
744 u32 phy_id = 0xffffffff; in create_phy_by_mask() local
749 int r = get_phy_id(bus, addr, devad, &phy_id); in create_phy_by_mask()
757 if (r == 0 && phy_id == 0) in create_phy_by_mask()
761 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) { in create_phy_by_mask()
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/u-boot/board/freescale/lx2160a/
A Deth_lx2160ardb.c30 u32 phy_id; in get_inphi_phy_id() local
33 phy_id = (phy_reg & 0xffff) << 16; in get_inphi_phy_id()
36 phy_id |= (phy_reg & 0xffff); in get_inphi_phy_id()
38 if (phy_id == PHY_UID_IN112525_S03) in get_inphi_phy_id()
/u-boot/drivers/usb/eth/
A Dlan7x.h169 int lan7x_mdio_read(struct usb_device *udev, int phy_id, int idx);
171 void lan7x_mdio_write(struct usb_device *udev, int phy_id, int idx,
176 int phy_id, const u32 reg, in lan7x_mdio_wait_for_bit() argument
185 val = lan7x_mdio_read(udev, phy_id, reg); in lan7x_mdio_wait_for_bit()
A Dlan7x.c69 int lan7x_mdio_read(struct usb_device *udev, int phy_id, int idx) in lan7x_mdio_read() argument
80 addr = (phy_id << 11) | (idx << 6) | in lan7x_mdio_read()
94 void lan7x_mdio_write(struct usb_device *udev, int phy_id, int idx, int regval) in lan7x_mdio_write() argument
107 addr = (phy_id << 11) | (idx << 6) | in lan7x_mdio_write()
214 priv->phydev = phy_connect(priv->mdiobus, dev->phy_id, in lan7x_eth_phylib_connect()
277 lcladv = lan7x_mdio_read(udev, dev->phy_id, MII_ADVERTISE); in lan7x_update_flowcontrol()
278 rmtadv = lan7x_mdio_read(udev, dev->phy_id, MII_LPA); in lan7x_update_flowcontrol()
361 dev->phy_id = LAN7X_INTERNAL_PHY_ID; /* fixed phy id */ in lan7x_basic_reset()
A Dasix.c180 static int asix_mdio_read(struct ueth_data *dev, int phy_id, int loc) in asix_mdio_read() argument
189 phy_id, loc, le16_to_cpu(*res)); in asix_mdio_read()
195 asix_mdio_write(struct ueth_data *dev, int phy_id, int loc, int val) in asix_mdio_write() argument
201 phy_id, loc, val); in asix_mdio_write()
327 bmcr = asix_mdio_read(dev, dev->phy_id, MII_BMCR); in mii_nway_restart()
331 asix_mdio_write(dev, dev->phy_id, MII_BMCR, bmcr); in mii_nway_restart()
404 dev->phy_id = asix_get_phy_addr(dev); in asix_basic_reset()
405 if (dev->phy_id < 0) in asix_basic_reset()
408 asix_mdio_write(dev, dev->phy_id, MII_BMCR, BMCR_RESET); in asix_basic_reset()
409 asix_mdio_write(dev, dev->phy_id, MII_ADVERTISE, in asix_basic_reset()
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A Dsmsc95xx.c221 static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx) in smsc95xx_mdio_read() argument
232 addr = (phy_id << 11) | (idx << 6) | MII_READ_; in smsc95xx_mdio_read()
260 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_; in smsc95xx_mdio_write()
338 bmcr = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMCR); in mii_nway_restart()
342 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, bmcr); in mii_nway_restart()
351 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET); in smsc95xx_phy_initialize()
352 smsc95xx_mdio_write(udev, dev->phy_id, MII_ADVERTISE, in smsc95xx_phy_initialize()
357 smsc95xx_mdio_read(udev, dev->phy_id, PHY_INT_SRC); in smsc95xx_phy_initialize()
359 smsc95xx_mdio_write(udev, dev->phy_id, PHY_INT_MASK, in smsc95xx_phy_initialize()
486 dev->phy_id = SMSC95XX_INTERNAL_PHY_ID; /* fixed phy id */ in smsc95xx_init_common()
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/u-boot/include/net/pfe_eth/
A Dpfe_mdio.h10 int pfe_phy_configure(struct pfe_eth_dev *priv, int dev_id, int phy_id);
/u-boot/drivers/net/pfe_eth/
A Dpfe_mdio.c211 int pfe_phy_configure(struct pfe_eth_dev *priv, int dev_id, int phy_id) in pfe_phy_configure() argument
235 phydev = phy_connect(gem->bus, phy_id, dev, gem->phy_mode); in pfe_phy_configure()
287 void pfe_set_phy_address_mode(int dev_id, int phy_id, int phy_mode) in pfe_set_phy_address_mode() argument
289 gem_info[dev_id].phy_address = phy_id; in pfe_set_phy_address_mode()
/u-boot/board/technologic/ts4800/
A Dts4800.c198 int phy_id = 0xFF; in board_eth_init() local
214 debug("eth_init: fec_probe(bd, %i, %i) @ %08x\n", dev_id, phy_id, addr); in board_eth_init()
219 phydev = phy_find_by_mask(bus, phy_id, PHY_INTERFACE_MODE_MII); in board_eth_init()
/u-boot/drivers/ddr/marvell/a38x/
A Dddr3_training_ip_flow.h76 u32 if_id, u32 phy_id,
80 u32 phy_id, enum hws_ddr_phy phy_type, u32 reg_addr,
83 u32 if_id, enum hws_access_type e_phy_access, u32 phy_id,
A Dddr3_training.c1093 u32 interface_id, u32 phy_id, in ddr3_tip_bus_read_modify_write() argument
1881 u32 if_id, phy_id, cs; in ddr3_tip_ddr3_reset_phy_regs() local
1887 for (phy_id = 0; phy_id < octets_per_if_num; in ddr3_tip_ddr3_reset_phy_regs()
1888 phy_id++) { in ddr3_tip_ddr3_reset_phy_regs()
1889 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, phy_id); in ddr3_tip_ddr3_reset_phy_regs()
1893 phy_id, DDR_PHY_DATA, in ddr3_tip_ddr3_reset_phy_regs()
1983 u32 if_id, phy_id; in ddr3_tip_adll_regs_bypass() local
1989 for (phy_id = 0; phy_id < octets_per_if_num; phy_id++) { in ddr3_tip_adll_regs_bypass()
1990 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, phy_id); in ddr3_tip_adll_regs_bypass()
1993 ACCESS_TYPE_UNICAST, phy_id, DDR_PHY_DATA, in ddr3_tip_adll_regs_bypass()
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A Dddr3_training_ip_prv_if.h48 enum hws_access_type phy_access_type, u32 phy_id,
52 u32 phy_id, enum hws_ddr_phy phy_type, u32 reg_addr, u32 *data);
A Dmv_ddr_plat.c1370 u32 if_id, phy_id; in ddr3_tip_configure_phy() local
1412 for (phy_id = 0; in ddr3_tip_configure_phy()
1413 phy_id < octets_per_if_num; in ddr3_tip_configure_phy()
1414 phy_id++) { in ddr3_tip_configure_phy()
1415 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, phy_id); in ddr3_tip_configure_phy()
1419 if_id, phy_id, DDR_PHY_DATA, in ddr3_tip_configure_phy()
1426 if_id, phy_id, DDR_PHY_CONTROL, in ddr3_tip_configure_phy()
/u-boot/board/ti/am335x/
A Dboard.c643 u32 phy_id[2]; in ft_board_setup() local
673 phy_id, 2); in ft_board_setup()
675 if (phy_id[1] != phy_addr) { in ft_board_setup()
677 alias, phy_id[1], phy_addr); in ft_board_setup()
679 phy_id[0] = cpu_to_fdt32(phy_id[0]); in ft_board_setup()
680 phy_id[1] = cpu_to_fdt32(phy_addr); in ft_board_setup()
682 phy_id, sizeof(phy_id), 0); in ft_board_setup()
/u-boot/drivers/qe/
A Duec_phy.c744 .phy_id = 0x0181b880,
754 .phy_id = 0x0181b8a0,
767 .phy_id = 0x01410c00,
779 .phy_id = 0x0143bca0,
788 .phy_id = CONFIG_FIXED_PHY,
796 .phy_id = 0x0007c0c0,
805 .phy_id = 0x00000000,
855 if (phy_info[i]->phy_id == in uec_get_phy_info()
/u-boot/board/gateworks/venice/
A Dimx8mm_venice.c72 switch (phydev->phy_id) { in board_phy_config()
/u-boot/include/fsl-mc/
A Dfsl_dpmac.h44 MC_RSP_OP(cmd, 0, 0, 32, int, attr->phy_id);\
248 int phy_id; member
/u-boot/include/
A Dphy.h163 u32 phy_id; member
169 int phy_id; member
538 int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
A Dusb_ether.h24 int phy_id; /* mii phy id */ member

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