Home
last modified time | relevance | path

Searched refs:phy_write (Results 1 – 25 of 76) sorted by relevance

1234

/u-boot/drivers/net/phy/
A Dmarvell.c138 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); in m88e1011s_config()
140 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in m88e1011s_config()
141 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0); in m88e1011s_config()
241 phy_write(phydev, in m88e1111s_config()
254 phy_write(phydev, in m88e1111s_config()
266 phy_write(phydev, MDIO_DEVAD_NONE, in m88e1111s_config()
274 phy_write(phydev, in m88e1111s_config()
282 phy_write(phydev, MDIO_DEVAD_NONE, in m88e1111s_config()
294 phy_write(phydev, MDIO_DEVAD_NONE, in m88e1111s_config()
376 phy_write(phydev, MDIO_DEVAD_NONE, in m88e151x_config()
[all …]
A Dmeson-gxl.c103 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); in meson_gxl_phy_config()
104 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); in meson_gxl_phy_config()
105 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); in meson_gxl_phy_config()
106 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); in meson_gxl_phy_config()
109 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x8E0D); in meson_gxl_phy_config()
110 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x4417); in meson_gxl_phy_config()
113 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x0005); in meson_gxl_phy_config()
114 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1B); in meson_gxl_phy_config()
117 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x029A); in meson_gxl_phy_config()
118 phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x5C1D); in meson_gxl_phy_config()
[all …]
A Dca_phy.c32 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0BC6); in __internal_phy_init()
33 phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x0053); in __internal_phy_init()
34 phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x4003); in __internal_phy_init()
35 phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x7e01); in __internal_phy_init()
36 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0A42); in __internal_phy_init()
37 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0A40); in __internal_phy_init()
38 phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x1140); in __internal_phy_init()
45 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0xB90); in __internal_phy_init()
64 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0007); in __external_phy_init()
67 phy_write(phydev, MDIO_DEVAD_NONE, 30, 0x002C); in __external_phy_init()
[all …]
A Dbroadcom.c42 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, in bcm_phy_write_misc()
139 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, reg); in bcm5482_config()
149 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_SHD, in bcm5482_config()
157 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_SHD, in bcm5482_config()
198 phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x02); in bcm_cygnus_afe()
201 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x00B1); in bcm_cygnus_afe()
202 phy_write(phydev, MDIO_DEVAD_NONE, 0x15, 0x0010); in bcm_cygnus_afe()
205 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x00B0); in bcm_cygnus_afe()
206 phy_write(phydev, MDIO_DEVAD_NONE, 0x15, 0x0010); in bcm_cygnus_afe()
209 phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x00B0); in bcm_cygnus_afe()
[all …]
A Dvitesse.c74 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT, in vitesse_config()
77 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_EXT_CON1, in vitesse_config()
132 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS8204_EPHY_CON, in cis8204_config()
136 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS8204_EPHY_CON, in cis8204_config()
175 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, in vsc8574_config()
182 phy_write(phydev, MDIO_DEVAD_NONE, in vsc8574_config()
201 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, in vsc8574_config()
220 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, in vsc8514_config()
227 phy_write(phydev, MDIO_DEVAD_NONE, in vsc8514_config()
257 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, in vsc8514_config()
[all …]
A Drealtek.c94 phy_write(phydev, MDIO_DEVAD_NONE, regnum, val); in rtl8211f_phy_extwrite()
155 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, reg); in rtl8211x_config()
162 phy_write(phydev, MDIO_DEVAD_NONE, in rtl8211x_config()
194 phy_write(phydev, MDIO_DEVAD_NONE, RTL8201F_RMSR, reg); in rtl8201f_config()
218 phy_write(phydev, MDIO_DEVAD_NONE, in rtl8211f_config()
229 phy_write(phydev, MDIO_DEVAD_NONE, 0x11, reg); in rtl8211f_config()
238 phy_write(phydev, MDIO_DEVAD_NONE, 0x15, reg); in rtl8211f_config()
241 phy_write(phydev, MDIO_DEVAD_NONE, in rtl8211f_config()
245 phy_write(phydev, MDIO_DEVAD_NONE, in rtl8211f_config()
247 phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x617f); in rtl8211f_config()
[all …]
A Daquantia.c194 phy_write(phydev, MDIO_MMD_VEND1, MAILBOX_DATA_MSW, in aquantia_load_memory()
196 phy_write(phydev, MDIO_MMD_VEND1, MAILBOX_DATA_LSW, in aquantia_load_memory()
199 phy_write(phydev, MDIO_MMD_VEND1, MAILBOX_CONTROL, in aquantia_load_memory()
263 phy_write(phydev, MDIO_MMD_VEND1, UP_CONTROL, in aquantia_upload_firmware()
284 phy_write(phydev, MDIO_MMD_VEND1, UP_CONTROL, in aquantia_upload_firmware()
333 phy_write(phydev, MDIO_MMD_VEND1, in aquantia_set_proto()
492 phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR, val); in aquantia_config()
504 phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR, in aquantia_config()
522 phy_write(phydev, MDIO_MMD_PHYXS, in aquantia_config()
530 phy_write(phydev, MDIO_MMD_AN, AQUNTIA_10G_CTL, 1); in aquantia_config()
[all …]
A Dmicrel_ksz90x1.c237 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9021_phy_extended_write()
239 return phy_write(phydev, MDIO_DEVAD_NONE, in ksz9021_phy_extended_write()
310 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_write()
313 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_write()
316 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_write()
319 return phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_write()
326 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_read()
328 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_read()
330 phy_write(phydev, MDIO_DEVAD_NONE, in ksz9031_phy_extended_read()
374 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, bmcr); in ksz9031_config()
[all …]
A Dnatsemi.c22 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in dp83630_config()
23 phy_write(phydev, MDIO_DEVAD_NONE, DP83630_PHY_PAGESEL_REG, 0x6); in dp83630_config()
27 phy_write(phydev, MDIO_DEVAD_NONE, DP83630_PHY_PTP_COC_REG, in dp83630_config()
29 phy_write(phydev, MDIO_DEVAD_NONE, DP83630_PHY_PAGESEL_REG, 0); in dp83630_config()
58 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in dp838xx_config()
/u-boot/board/beacon/imx8mn/
A Dimx8mn_beacon.c32 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); in board_phy_config()
33 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); in board_phy_config()
35 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); in board_phy_config()
36 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); in board_phy_config()
37 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in board_phy_config()
38 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); in board_phy_config()
/u-boot/board/beacon/imx8mm/
A Dimx8mm_beacon.c32 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); in board_phy_config()
33 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); in board_phy_config()
35 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); in board_phy_config()
36 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); in board_phy_config()
37 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in board_phy_config()
38 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); in board_phy_config()
/u-boot/board/freescale/imx8mm_evk/
A Dimx8mm_evk.c34 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); in board_phy_config()
35 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); in board_phy_config()
37 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); in board_phy_config()
38 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); in board_phy_config()
39 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in board_phy_config()
40 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); in board_phy_config()
/u-boot/board/spear/x600/
A Dx600.c86 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00); in board_phy_config()
113 phy_write(phydev, MDIO_DEVAD_NONE, 23, 0x0020); in board_phy_config()
119 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0001); in board_phy_config()
122 phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff); in board_phy_config()
123 phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff); in board_phy_config()
126 phy_write(phydev, MDIO_DEVAD_NONE, 16, 0xe0ea); in board_phy_config()
129 phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0000); in board_phy_config()
132 phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x0049); in board_phy_config()
/u-boot/board/Marvell/db-mv784mp-gp/
A Ddb-mv784mp-gp.c99 phy_write(phydev, MDIO_DEVAD_NONE, 0x16, 4); in board_phy_config()
101 phy_write(phydev, MDIO_DEVAD_NONE, 0x0, 0x1140); in board_phy_config()
103 phy_write(phydev, MDIO_DEVAD_NONE, 0x16, 0); in board_phy_config()
108 phy_write(phydev, MDIO_DEVAD_NONE, 0x4, reg); in board_phy_config()
111 phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0000); in board_phy_config()
112 phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x9140); in board_phy_config()
117 phy_write(phydev, MDIO_DEVAD_NONE, ETH_PHY_CTRL_REG, reg); in board_phy_config()
/u-boot/board/advantech/imx8qm_rom7720_a1/
A Dimx8qm_rom7720_a1.c82 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); in board_phy_config()
83 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); in board_phy_config()
85 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); in board_phy_config()
86 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); in board_phy_config()
87 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in board_phy_config()
88 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); in board_phy_config()
/u-boot/board/k+p/kp_imx6q_tpc/
A Dkp_imx6q_tpc.c58 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); in ar8031_phy_fixup()
59 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); in ar8031_phy_fixup()
60 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); in ar8031_phy_fixup()
65 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in ar8031_phy_fixup()
68 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in ar8031_phy_fixup()
71 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); in ar8031_phy_fixup()
/u-boot/board/freescale/imx8qm_mek/
A Dimx8qm_mek.c70 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); in board_phy_config()
71 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); in board_phy_config()
73 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); in board_phy_config()
74 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); in board_phy_config()
75 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in board_phy_config()
76 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); in board_phy_config()
/u-boot/board/compulab/cl-som-imx7/
A Dcl-som-imx7.c139 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x3); in cl_som_imx7_rgmii_rework()
140 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d); in cl_som_imx7_rgmii_rework()
141 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003); in cl_som_imx7_rgmii_rework()
144 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in cl_som_imx7_rgmii_rework()
147 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); in cl_som_imx7_rgmii_rework()
148 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); in cl_som_imx7_rgmii_rework()
149 phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); in cl_som_imx7_rgmii_rework()
154 phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); in cl_som_imx7_rgmii_rework()
157 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in cl_som_imx7_rgmii_rework()
160 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); in cl_som_imx7_rgmii_rework()
/u-boot/board/mscc/jr2/
A Djr2.c77 phy_write(phydev, 0, 31, 0x10); in board_phy_config()
78 phy_write(phydev, 0, 18, 0x80F0); in board_phy_config()
81 phy_write(phydev, 0, 31, 0); in board_phy_config()
84 phy_write(phydev, 0, 31, 0x10); in board_phy_config()
85 phy_write(phydev, 0, 18, 0x80A0); in board_phy_config()
88 phy_write(phydev, 0, 14, 0x800); in board_phy_config()
89 phy_write(phydev, 0, 31, 0); in board_phy_config()
/u-boot/board/mscc/serval/
A Dserval.c36 phy_write(phydev, 0, 31, 0x10); in board_phy_config()
37 phy_write(phydev, 0, 18, 0x80F0); in board_phy_config()
40 phy_write(phydev, 0, 14, 0x800); in board_phy_config()
41 phy_write(phydev, 0, 31, 0); in board_phy_config()
/u-boot/board/google/imx8mq_phanbell/
A Dimx8mq_phanbell.c66 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); in board_phy_config()
67 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); in board_phy_config()
69 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in board_phy_config()
70 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); in board_phy_config()
/u-boot/board/freescale/imx8mq_evk/
A Dimx8mq_evk.c71 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); in board_phy_config()
72 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); in board_phy_config()
74 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in board_phy_config()
75 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); in board_phy_config()
/u-boot/board/congatec/cgtqmx6eval/
A Dcgtqmx6eval.c341 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2); in mx6_rgmii_rework()
342 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 4); in mx6_rgmii_rework()
346 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2); in mx6_rgmii_rework()
347 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 5); in mx6_rgmii_rework()
351 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2); in mx6_rgmii_rework()
352 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 6); in mx6_rgmii_rework()
356 phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2); in mx6_rgmii_rework()
383 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); in mx6_rgmii_rework()
386 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); in mx6_rgmii_rework()
389 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0xb); in mx6_rgmii_rework()
[all …]
/u-boot/board/mscc/luton/
A Dluton.c43 phy_write(phydev, 0, 31, 0x10); in board_phy_config()
44 phy_write(phydev, 0, 18, 0x80A0); in board_phy_config()
47 phy_write(phydev, 0, 31, 0); in board_phy_config()
/u-boot/board/keymile/kmp204x/
A Deth.c64 phy_write(phydev, MDIO_DEVAD_NONE, mv88E1118_PAGE_REG, 0x0003); in board_phy_config()
65 phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x0840); in board_phy_config()
66 phy_write(phydev, MDIO_DEVAD_NONE, mv88E1118_PAGE_REG, 0x0000); in board_phy_config()

Completed in 24 milliseconds

1234