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Searched refs:phyaddr (Results 1 – 25 of 41) sorted by relevance

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/u-boot/board/LaCie/common/
A Dcommon.c20 void mv_phy_88e1116_init(const char *name, u16 phyaddr) in mv_phy_88e1116_init() argument
31 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 2); in mv_phy_88e1116_init()
35 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 0); in mv_phy_88e1116_init()
37 if (miiphy_reset(name, phyaddr) == 0) in mv_phy_88e1116_init()
41 void mv_phy_88e1318_init(const char *name, u16 phyaddr) in mv_phy_88e1318_init() argument
51 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 3); in mv_phy_88e1318_init()
52 miiphy_read(name, phyaddr, 16, &reg); in mv_phy_88e1318_init()
54 miiphy_write(name, phyaddr, 16, reg); in mv_phy_88e1318_init()
60 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 2); in mv_phy_88e1318_init()
64 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 0); in mv_phy_88e1318_init()
[all …]
A Dcommon.h10 void mv_phy_88e1116_init(const char *name, u16 phyaddr);
11 void mv_phy_88e1318_init(const char *name, u16 phyaddr);
/u-boot/board/zyxel/nsa310s/
A Dnsa310s.c88 u16 phyaddr; in reset_phy() local
95 if (miiphy_read(name, 0xee, 0xee, (u16 *) &phyaddr)) { in reset_phy()
105 miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); in reset_phy()
108 if (miiphy_reset(name, phyaddr)) in reset_phy()
119 miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, &reg); in reset_phy()
124 miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg); in reset_phy()
126 miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); in reset_phy()
129 miiphy_write(name, phyaddr, 0x4, 0x1e1); in reset_phy()
130 miiphy_write(name, phyaddr, 0x9, 0x300); in reset_phy()
132 miiphy_write(name, phyaddr, 0x10, 0x3860); in reset_phy()
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/u-boot/drivers/net/
A Dmcfmii.c139 int phyaddr, pass; in mii_discover_phy() local
146 phyaddr = -1; /* didn't find a PHY yet */ in mii_discover_phy()
147 for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) { in mii_discover_phy()
157 for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) { in mii_discover_phy()
165 phyaddr = phyno; in mii_discover_phy()
200 if (phyaddr < 0) in mii_discover_phy()
203 return phyaddr; in mii_discover_phy()
A Dxilinx_emaclite.c93 int phyaddr; member
268 if (emaclite->phyaddr != -1) { in setup_phy()
274 emaclite->phyaddr); in setup_phy()
277 emaclite->phyaddr); in setup_phy()
278 emaclite->phyaddr = -1; in setup_phy()
282 if (emaclite->phyaddr == -1) { in setup_phy()
289 emaclite->phyaddr = i; in setup_phy()
298 phydev = phy_connect(emaclite->bus, emaclite->phyaddr, dev, in setup_phy()
607 emaclite->phyaddr = -1; in emaclite_of_to_plat()
612 emaclite->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, in emaclite_of_to_plat()
[all …]
A Dbcm-sf2-eth.h52 int (*miiphy_read)(struct mii_dev *bus, int phyaddr, int devad,
54 int (*miiphy_write)(struct mii_dev *bus, int phyaddr, int devad,
A Dxilinx_axi_emac.c94 int phyaddr; member
264 if (priv->phyaddr == -1) { in axiemac_phy_init()
271 priv->phyaddr = i; in axiemac_phy_init()
280 phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); in axiemac_phy_init()
307 ret = phyread(priv, priv->phyaddr, MII_BMCR, &temp); in setup_phy()
312 ret = phywrite(priv, priv->phyaddr, MII_BMCR, temp); in setup_phy()
756 priv->phyaddr = -1; in axi_emac_of_to_plat()
760 priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1); in axi_emac_of_to_plat()
777 priv->phyaddr, phy_string_for_interface(priv->interface)); in axi_emac_of_to_plat()
A Dmpc8xx_fec.c759 int phyaddr; in mii_discover_phy() local
761 phyaddr = -1; /* didn't find a PHY yet */ in mii_discover_phy()
762 for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) { in mii_discover_phy()
771 for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) { in mii_discover_phy()
774 phyaddr = phyno; in mii_discover_phy()
780 if (phyaddr < 0) in mii_discover_phy()
783 return phyaddr; in mii_discover_phy()
A Dax88180.c261 unsigned short phyaddr; in ax88180_phy_initial() local
265 phyaddr = CONFIG_PHY_ADDR; in ax88180_phy_initial()
267 for (phyaddr = 0; phyaddr < 32; ++phyaddr) in ax88180_phy_initial()
270 priv->PhyAddr = phyaddr; in ax88180_phy_initial()
A Dftmac110.c70 uint8_t phyaddr, uint8_t phyreg) in mdio_read() argument
78 | (phyaddr << PHYCR_ADDR_SHIFT) in mdio_read()
99 uint8_t phyaddr, uint8_t phyreg, uint16_t phydata) in mdio_write() argument
106 | (phyaddr << PHYCR_ADDR_SHIFT) in mdio_write()
A Dbcm-sf2-eth-gmac.c610 int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg) in gmac_miiphy_read() argument
623 tmp |= (phyaddr << GMAC_MII_PHY_ADDR_SHIFT) | in gmac_miiphy_read()
625 debug("MII read cmd 0x%x, phy 0x%x, reg 0x%x\n", tmp, phyaddr, reg); in gmac_miiphy_read()
638 int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg, in gmac_miiphy_write() argument
651 tmp |= ((phyaddr << GMAC_MII_PHY_ADDR_SHIFT) | in gmac_miiphy_write()
654 tmp, phyaddr, reg, value); in gmac_miiphy_write()
A Dfec_mxc.c94 static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyaddr, in fec_mdio_read() argument
108 phy = phyaddr << FEC_MII_DATA_PA_SHIFT; in fec_mdio_read()
127 debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyaddr, in fec_mdio_read()
204 static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyaddr, in fec_mdio_write() argument
212 phy = phyaddr << FEC_MII_DATA_PA_SHIFT; in fec_mdio_write()
228 debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyaddr, in fec_mdio_write()
234 static int fec_phy_read(struct mii_dev *bus, int phyaddr, int dev_addr, in fec_phy_read() argument
237 return fec_mdio_read(bus->priv, phyaddr, regaddr); in fec_phy_read()
240 static int fec_phy_write(struct mii_dev *bus, int phyaddr, int dev_addr, in fec_phy_write() argument
243 return fec_mdio_write(bus->priv, phyaddr, regaddr, data); in fec_phy_write()
A Dsmc91111.c893 byte phyaddr = SMC_PHY_ADDR; in smc_read_phy_register() local
910 if (phyaddr & mask) in smc_read_phy_register()
989 phyaddr, phyreg, phydata); in smc_read_phy_register()
1009 byte phyaddr = SMC_PHY_ADDR; in smc_write_phy_register() local
1026 if (phyaddr & mask) in smc_write_phy_register()
1101 phyaddr, phyreg, phydata); in smc_write_phy_register()
A Dzynq_gem.c202 int phyaddr; member
319 priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, in zynq_phy_init()
778 priv->phyaddr = -1; in zynq_gem_of_to_plat()
786 priv->phyaddr = ofnode_read_u32_default(phandle_args.node, in zynq_gem_of_to_plat()
813 (ulong)priv->iobase, (ulong)priv->mdiobase, priv->phyaddr, in zynq_gem_of_to_plat()
A Dsun8i_emac.c164 u32 phyaddr; member
311 reg |= priv->phyaddr << H3_EPHY_ADDR_SHIFT; in sun8i_emac_set_syscon_ephy()
389 phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); in sun8i_phy_init()
934 priv->phyaddr = -1; in sun8i_emac_eth_of_to_plat()
942 priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1); in sun8i_emac_eth_of_to_plat()
A Dhigmacv300.c121 int phyaddr; member
535 phydev = phy_connect(bus, priv->phyaddr, dev, priv->phyintf); in higmac_probe()
583 priv->phyaddr = ofnode_read_u32_default(phy_node, "reg", 0); in higmac_of_to_plat()
A Daltera_tse.h224 unsigned int phyaddr; member
A Dmvgbe.c905 return dmvgbe->phyaddr > PHY_MAX_ADDR; in mvgbe_port_is_fixed_link()
921 dmvgbe->phyaddr); in mvgbe_start()
1020 dmvgbe->phyaddr = PHY_MAX_ADDR + 1; in mvgbe_of_to_plat()
1027 dmvgbe->phyaddr = fdtdec_get_int(blob, addr, "reg", 0); in mvgbe_of_to_plat()
/u-boot/drivers/net/phy/
A Dmv88e6352.c238 u16 value = 0, phyaddr, reg, port; in do_mvsw_reg_read() local
241 phyaddr = simple_strtoul(argv[1], NULL, 10); in do_mvsw_reg_read()
245 ret = sw_reg_read(name, phyaddr, port, reg, &value); in do_mvsw_reg_read()
253 u16 value = 0, phyaddr, reg, port; in do_mvsw_reg_write() local
256 phyaddr = simple_strtoul(argv[1], NULL, 10); in do_mvsw_reg_write()
261 ret = sw_reg_write(name, phyaddr, port, reg, value); in do_mvsw_reg_write()
/u-boot/board/freescale/common/
A Dsgmii_riser.c29 tsec_info[i].phyaddr += SGMII_RISER_PHY_OFFSET; in fsl_sgmii_riser_init()
120 priv->phyaddr); in fsl_sgmii_riser_fdt_fixup()
/u-boot/include/
A Dtsec.h55 .phyaddr = TSEC##num##_PHY_ADDR, \
65 x.phyaddr = TSEC##num##_PHY_ADDR; \
409 uint phyaddr; member
428 unsigned int phyaddr; member
A Dmiiphy.h172 struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr,
/u-boot/net/
A Dmdio-uclass.c121 struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr, in dm_mdio_phy_connect() argument
130 return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface); in dm_mdio_phy_connect()
/u-boot/board/freescale/mpc837xemds/
A Dmpc837xemds.c112 tsec_info[num].phyaddr = TSEC1_PHY_ADDR_SGMII; in board_eth_init()
130 tsec_info[num].phyaddr = TSEC2_PHY_ADDR_SGMII; in board_eth_init()
/u-boot/drivers/net/fm/
A Dfm.h145 int phyaddr; member

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