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Searched refs:phys_start (Results 1 – 25 of 44) sorted by relevance

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/u-boot/arch/x86/lib/fsp/
A Dfsp_support.c16 phys_addr_t phys_start; in fsp_get_usable_lowmem_top() local
32 phys_start = res_desc->phys_start; in fsp_get_usable_lowmem_top()
34 if (phys_start >= FSP_LOWMEM_BASE && in fsp_get_usable_lowmem_top()
35 phys_start < (phys_addr_t)FSP_HIGHMEM_BASE) in fsp_get_usable_lowmem_top()
78 phys_addr_t phys_start; in fsp_get_usable_highmem_top() local
90 phys_start = res_desc->phys_start; in fsp_get_usable_highmem_top()
92 if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE) in fsp_get_usable_highmem_top()
120 return (u64)(res_desc->phys_start); in fsp_get_reserved_mem_from_guid()
A Dfsp_dram.c69 low_end = res_desc->phys_start; in dram_init_banksize()
73 if (res_desc->phys_start < (1ULL << 32)) { in dram_init_banksize()
75 res_desc->phys_start + res_desc->len); in dram_init_banksize()
77 gd->bd->bi_dram[bank].start = res_desc->phys_start; in dram_init_banksize()
79 mtrr_add_request(MTRR_TYPE_WRBACK, res_desc->phys_start, in dram_init_banksize()
114 entries[num_entries].addr = res_desc->phys_start; in install_e820_map()
/u-boot/board/freescale/mpc837xerdb/
A Dpci.c16 phys_start: CONFIG_SYS_PCI_MEM_PHYS,
22 phys_start: CONFIG_SYS_PCI_MMIO_PHYS,
28 phys_start: CONFIG_SYS_PCI_IO_PHYS,
37 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
43 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
52 .phys_start = CONFIG_SYS_PCIE2_MEM_PHYS,
58 .phys_start = CONFIG_SYS_PCIE2_IO_PHYS,
/u-boot/board/freescale/mpc8349itx/
A Dpci.c20 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
26 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
32 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
42 phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
48 phys_start: CONFIG_SYS_PCI2_IO_PHYS,
54 phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
/u-boot/board/freescale/mpc837xemds/
A Dpci.c22 phys_start: CONFIG_SYS_PCI_MEM_PHYS,
28 phys_start: CONFIG_SYS_PCI_MMIO_PHYS,
34 phys_start: CONFIG_SYS_PCI_IO_PHYS,
43 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
49 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
58 .phys_start = CONFIG_SYS_PCIE2_MEM_PHYS,
64 .phys_start = CONFIG_SYS_PCIE2_IO_PHYS,
/u-boot/board/freescale/mpc832xemds/
A Dpci.c23 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
29 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
35 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
45 phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
51 phys_start: CONFIG_SYS_PCI2_IO_PHYS,
57 phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
/u-boot/board/freescale/mpc8315erdb/
A Dmpc8315erdb.c73 phys_start: CONFIG_SYS_PCI_MEM_PHYS,
79 phys_start: CONFIG_SYS_PCI_MMIO_PHYS,
85 phys_start: CONFIG_SYS_PCI_IO_PHYS,
94 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
100 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
109 .phys_start = CONFIG_SYS_PCIE2_MEM_PHYS,
115 .phys_start = CONFIG_SYS_PCIE2_IO_PHYS,
/u-boot/drivers/pci/
A Dpci_mpc85xx.c61 set_next_law(mem->phys_start, law_size_bits(mem->size), in mpc85xx_pci_dm_setup_laws()
64 set_next_law(io->phys_start, law_size_bits(io->size), in mpc85xx_pci_dm_setup_laws()
67 set_next_law(pre->phys_start, law_size_bits(pre->size), in mpc85xx_pci_dm_setup_laws()
98 out_be32(&pcix->powbar1, mem->phys_start >> 12); in mpc85xx_pci_dm_probe()
99 out_be32(&pcix->powbear1, (u64)mem->phys_start >> 44); in mpc85xx_pci_dm_probe()
106 out_be32(&pcix->powbar2, io->phys_start >> 12); in mpc85xx_pci_dm_probe()
107 out_be32(&pcix->powbear2, (u64)io->phys_start >> 44); in mpc85xx_pci_dm_probe()
A Dpcie_layerscape_rc.c79 io->phys_start = (io->phys_start & in ls_pcie_setup_atu()
84 mem->phys_start = (mem->phys_start & in ls_pcie_setup_atu()
89 pref->phys_start = (pref->phys_start & in ls_pcie_setup_atu()
99 io->phys_start + offset, in ls_pcie_setup_atu()
107 mem->phys_start + offset, in ls_pcie_setup_atu()
115 pref->phys_start + offset, in ls_pcie_setup_atu()
A Dpcie_dw_rockchip.c500 pcie->io.phys_start, in rockchip_pcie_rd_conf()
546 pcie->io.phys_start, in rockchip_pcie_wr_conf()
818 priv->io.phys_start = hose->regions[ret].phys_start; /* IO base */ in rockchip_pcie_probe()
822 priv->mem.phys_start = hose->regions[ret].phys_start; /* MEM base */ in rockchip_pcie_probe()
826 priv->cfg_base = (void *)(priv->io.phys_start - priv->io.size); in rockchip_pcie_probe()
838 priv->io.phys_start, priv->io.phys_start + priv->io.size, in rockchip_pcie_probe()
846 priv->mem.phys_start, priv->mem.phys_start + priv->mem.size, in rockchip_pcie_probe()
856 priv->mem.phys_start, in rockchip_pcie_probe()
A Dpcie_dw_mvebu.c271 PCIE_ATU_TYPE_IO, pcie->io.phys_start, in pcie_dw_mvebu_read_config()
316 PCIE_ATU_TYPE_IO, pcie->io.phys_start, in pcie_dw_mvebu_write_config()
517 pcie->io.phys_start = hose->regions[0].phys_start; /* IO base */ in pcie_dw_mvebu_probe()
521 pcie->mem.phys_start = hose->regions[1].phys_start; /* MEM base */ in pcie_dw_mvebu_probe()
526 PCIE_ATU_TYPE_MEM, pcie->mem.phys_start, in pcie_dw_mvebu_probe()
A Dfsl_pci_init.c66 out_be32(&pi->pitar, r->phys_start >> 12); in set_inbound_window()
123 (u64)bus_start, (u64)phys_start, (u64)sz); in fsl_pci_setup_inbound_windows()
124 pci_set_region(r, bus_start, phys_start, sz, in fsl_pci_setup_inbound_windows()
139 (u64)bus_start, (u64)phys_start, (u64)pci_sz); in fsl_pci_setup_inbound_windows()
140 pci_set_region(r, bus_start, phys_start, pci_sz, in fsl_pci_setup_inbound_windows()
147 phys_start += pci_sz; in fsl_pci_setup_inbound_windows()
152 (u64)bus_start, (u64)phys_start, (u64)pci_sz); in fsl_pci_setup_inbound_windows()
159 phys_start += pci_sz; in fsl_pci_setup_inbound_windows()
187 (u64)bus_start, (u64)phys_start, (u64)pci_sz); in fsl_pci_setup_inbound_windows()
193 phys_start += pci_sz; in fsl_pci_setup_inbound_windows()
[all …]
A Dpci_auto_common.c80 (unsigned long long)region->phys_start, in pciauto_show_region()
81 (unsigned long long)(region->phys_start + region->size - 1)); in pciauto_show_region()
A Dpcie_dw_ti.c323 PCIE_ATU_TYPE_IO, pcie->io.phys_start, in pcie_dw_ti_read_config()
368 PCIE_ATU_TYPE_IO, pcie->io.phys_start, in pcie_dw_ti_write_config()
658 pci->io.phys_start = hose->regions[0].phys_start; /* IO base */ in pcie_dw_ti_probe()
662 pci->mem.phys_start = hose->regions[1].phys_start; /* MEM base */ in pcie_dw_ti_probe()
668 pci->mem.phys_start, in pcie_dw_ti_probe()
/u-boot/board/sbc8349/
A Dpci.c23 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
29 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
35 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
/u-boot/board/freescale/mpc8349emds/
A Dpci.c19 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
25 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
31 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
41 phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
47 phys_start: CONFIG_SYS_PCI2_IO_PHYS,
53 phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
/u-boot/board/tqc/tqm834x/
A Dpci.c21 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
27 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
33 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
/u-boot/board/esd/vme8349/
A Dpci.c27 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
33 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
39 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
/u-boot/board/freescale/mpc8313erdb/
A Dmpc8313erdb.c61 .phys_start = CONFIG_SYS_PCI1_MEM_PHYS,
67 .phys_start = CONFIG_SYS_PCI1_MMIO_PHYS,
73 .phys_start = CONFIG_SYS_PCI1_IO_PHYS,
/u-boot/board/mpc8308_p1m/
A Dmpc8308_p1m.c31 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
37 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
/u-boot/board/freescale/mpc8323erdb/
A Dmpc8323erdb.c147 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
153 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
159 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
/u-boot/arch/x86/cpu/tangier/
A Dsdram.c117 start = mentry->phys_start; in sfi_setup_e820()
163 gd->bd->bi_dram[bank].start = mentry->phys_start; in sfi_get_bank_size()
224 start = mentry->phys_start; in board_get_usable_ram_top()
/u-boot/board/ve8313/
A Dve8313.c158 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
164 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
170 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
/u-boot/board/freescale/mpc8308rdb/
A Dmpc8308rdb.c95 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
101 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
/u-boot/cmd/x86/
A Dhob.c85 res->phys_start, res->len, res->phys_start + res->len, in show_hob_details()

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