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Searched refs:plat (Results 1 – 25 of 370) sorted by relevance

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/u-boot/drivers/clk/altera/
A Dclk-agilex.c44 CM_REG_WRITEL(plat, val, CLKMGR_CTRL); in clk_write_ctrl()
248 clk_write_ctrl(plat, in clk_basic_init()
321 CM_REG_WRITEL(plat, CM_REG_READL(plat, CLKMGR_MAINPLL_PLLGLOB) | in clk_basic_init()
324 CM_REG_WRITEL(plat, CM_REG_READL(plat, CLKMGR_PERPLL_PLLGLOB) | in clk_basic_init()
329 clk_write_bypass_mainpll(plat, 0); in clk_basic_init()
330 clk_write_bypass_perpll(plat, 0); in clk_basic_init()
342 clk_write_ctrl(plat, in clk_basic_init()
540 reg = CM_REG_READL(plat, ctr_reg); in clk_get_emac_clk_hz()
593 return clk_get_mpu_clk_hz(plat); in socfpga_clk_get_rate()
599 return clk_get_l4_mp_clk_hz(plat); in socfpga_clk_get_rate()
[all …]
A Dclk-arria10.c58 if (!plat->ctl_reg) { in socfpga_a10_clk_get_upstream()
63 reg = readl(plat->regs + plat->ctl_reg); in socfpga_a10_clk_get_upstream()
93 clrbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit)); in socfpga_a10_clk_endisable()
107 setbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit)); in socfpga_a10_clk_endisable()
136 reg = readl(plat->regs + plat->ctl_reg + 4); /* VCO1 */ in socfpga_a10_clk_get_rate()
144 reg = readl(plat->regs + plat->ctl_reg + 4); /* VCO1 */ in socfpga_a10_clk_get_rate()
152 rate /= plat->fix_div; in socfpga_a10_clk_get_rate()
154 if (plat->fix_div == 1 && plat->ctl_reg) { in socfpga_a10_clk_get_rate()
155 reg = readl(plat->regs + plat->ctl_reg); in socfpga_a10_clk_get_rate()
160 if (plat->div_reg) { in socfpga_a10_clk_get_rate()
[all …]
/u-boot/test/dm/
A Dof_platdata.c35 plat = dev_get_plat(dev); in dm_test_of_plat_props()
36 ut_assert(plat->boolval); in dm_test_of_plat_props()
37 ut_asserteq(1, plat->intval); in dm_test_of_plat_props()
43 ut_asserteq(5, plat->byteval); in dm_test_of_plat_props()
58 plat = dev_get_plat(dev); in dm_test_of_plat_props()
59 ut_assert(!plat->boolval); in dm_test_of_plat_props()
78 plat = dev_get_plat(dev); in dm_test_of_plat_props()
79 ut_assert(!plat->boolval); in dm_test_of_plat_props()
85 plat = dev_get_plat(dev); in dm_test_of_plat_props()
86 ut_assert(!plat->boolval); in dm_test_of_plat_props()
[all …]
/u-boot/drivers/power/pmic/
A Di2c_pmic_emul.c35 if (plat->rw_idx + len > plat->buf_size) { in sandbox_i2c_pmic_read_data()
42 (unsigned int)chip & 0xff, plat->rw_reg, plat->rw_idx, len); in sandbox_i2c_pmic_read_data()
44 memcpy(buffer, plat->reg + plat->rw_idx, len); in sandbox_i2c_pmic_read_data()
61 plat->rw_idx = plat->rw_reg * plat->trans_len; in sandbox_i2c_pmic_write_data()
64 (unsigned int)chip & 0xff, plat->rw_reg, plat->rw_idx, len); in sandbox_i2c_pmic_write_data()
73 if (plat->rw_idx + len > plat->buf_size) { in sandbox_i2c_pmic_write_data()
78 memcpy(plat->reg + plat->rw_idx, buffer, len); in sandbox_i2c_pmic_write_data()
125 plat->buf_size = plat->reg_count * plat->trans_len; in sandbox_i2c_pmic_probe()
127 plat->reg = calloc(1, plat->buf_size); in sandbox_i2c_pmic_probe()
128 if (!plat->reg) { in sandbox_i2c_pmic_probe()
[all …]
/u-boot/drivers/gpio/
A Ddwapb_gpio.c50 clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); in dwapb_gpio_direction_input()
59 setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
62 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin); in dwapb_gpio_direction_output()
86 gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank)); in dwapb_gpio_get_function()
100 value = readl(plat->base + GPIO_SWPORT_DR(plat->bank)); in dwapb_gpio_get_value()
102 value = readl(plat->base + GPIO_EXT_PORT(plat->bank)); in dwapb_gpio_get_value()
146 if (!plat) { in gpio_dwapb_probe()
166 if (plat) in gpio_dwapb_bind()
180 plat = devm_kcalloc(dev, 1, sizeof(*plat), GFP_KERNEL); in gpio_dwapb_bind()
181 if (!plat) in gpio_dwapb_bind()
[all …]
A Dmt7621_gpio.c119 if (plat) { in gpio_mediatek_probe()
139 if (plat) in gpio_mediatek_bind()
148 struct mediatek_gpio_plat *plat; in gpio_mediatek_bind() local
151 plat = calloc(1, sizeof(*plat)); in gpio_mediatek_bind()
152 if (!plat) in gpio_mediatek_bind()
154 plat->bank_name[0] = 'P'; in gpio_mediatek_bind()
155 plat->bank_name[1] = 'A' + bank; in gpio_mediatek_bind()
156 plat->bank_name[2] = '\0'; in gpio_mediatek_bind()
157 plat->gpio_count = MTK_BANK_WIDTH; in gpio_mediatek_bind()
158 plat->bank = bank; in gpio_mediatek_bind()
[all …]
A Diproc_gpio.c148 list_add_tail(&range->node, &plat->gpiomap); in iproc_get_gpio_pctrl_mapping()
160 if (!plat->pinctrl_dev) in iproc_gpio_request()
228 plat->base = dev_read_addr_ptr(dev); in iproc_gpio_of_to_plat()
229 if (!plat->base) { in iproc_gpio_of_to_plat()
241 &plat->pinctrl_dev); in iproc_gpio_of_to_plat()
247 INIT_LIST_HEAD(&plat->gpiomap); in iproc_gpio_of_to_plat()
256 plat->name = strdup(name); in iproc_gpio_of_to_plat()
257 if (!plat->name) in iproc_gpio_of_to_plat()
260 uc_priv->gpio_count = plat->ngpios; in iproc_gpio_of_to_plat()
261 uc_priv->bank_name = plat->name; in iproc_gpio_of_to_plat()
[all …]
A Dxilinx_gpio.c45 max_pins = plat->bank_max[bank]; in xilinx_gpio_get_bank_pin()
102 if (plat->bank_output[bank]) { in xilinx_gpio_get_value()
126 if (plat->bank_input[bank]) in xilinx_gpio_get_function()
130 if (plat->bank_output[bank]) in xilinx_gpio_get_function()
155 if (plat->bank_input[bank]) in xilinx_gpio_direction_output()
160 if (!plat->bank_output[bank]) { in xilinx_gpio_direction_output()
180 if (plat->bank_input[bank]) in xilinx_gpio_direction_input()
184 if (plat->bank_output[bank]) in xilinx_gpio_direction_input()
212 if (!plat->bank_max[1]) { in xilinx_gpio_xlate()
256 uc_priv->gpio_count = plat->bank_max[0] + plat->bank_max[1]; in xilinx_gpio_probe()
[all …]
A Dnx_gpio.c48 struct nx_gpio_plat *plat = dev_get_plat(dev); in nx_alive_gpio_is_check() local
49 const char *bank_name = plat->bank_name; in nx_alive_gpio_is_check()
59 struct nx_gpio_plat *plat = dev_get_plat(dev); in nx_alive_gpio_direction_input() local
70 struct nx_gpio_plat *plat = dev_get_plat(dev); in nx_alive_gpio_direction_output() local
85 struct nx_gpio_plat *plat = dev_get_plat(dev); in nx_alive_gpio_get_value() local
98 struct nx_gpio_plat *plat = dev_get_plat(dev); in nx_alive_gpio_set_value() local
127 struct nx_gpio_regs *const regs = plat->regs; in nx_gpio_direction_input()
141 struct nx_gpio_regs *const regs = plat->regs; in nx_gpio_direction_output()
159 struct nx_gpio_regs *const regs = plat->regs; in nx_gpio_get_value()
210 uc_priv->gpio_count = plat->gpio_count; in nx_gpio_probe()
[all …]
/u-boot/drivers/usb/musb-new/
A Domap2430.c181 plat->plat.power = fdtdec_get_int(fdt, node, "power", -1); in omap2430_musb_of_to_plat()
182 if (plat->plat.power < 0) { in omap2430_musb_of_to_plat()
196 plat->plat.mode = fdtdec_get_int(fdt, node, "mode", -1); in omap2430_musb_of_to_plat()
197 if (plat->plat.mode < 0) { in omap2430_musb_of_to_plat()
203 plat->plat.mode = MUSB_HOST; in omap2430_musb_of_to_plat()
205 plat->plat.mode = MUSB_PERIPHERAL; in omap2430_musb_of_to_plat()
209 plat->plat.config = &plat->musb_config; in omap2430_musb_of_to_plat()
210 plat->plat.platform_ops = &omap2430_ops; in omap2430_musb_of_to_plat()
211 plat->plat.board_data = &plat->otg_board_data; in omap2430_musb_of_to_plat()
233 host->host = musb_init_controller(&plat->plat, in omap2430_musb_probe()
[all …]
/u-boot/drivers/rtc/
A Di2c_rtc_emul.c56 old_offset = plat->offset; in sandbox_i2c_rtc_set_offset()
59 plat->offset = offset; in sandbox_i2c_rtc_set_offset()
60 os_set_time_offset(plat->offset); in sandbox_i2c_rtc_set_offset()
70 old_base_time = plat->base_time; in sandbox_i2c_rtc_get_set_base_time()
72 plat->base_time = base_time; in sandbox_i2c_rtc_get_set_base_time()
85 plat->use_system_time = true; in reset_time()
94 if (plat->use_system_time) { in sandbox_i2c_rtc_get()
98 now = plat->base_time; in sandbox_i2c_rtc_get()
112 if (plat->use_system_time) { in sandbox_i2c_rtc_set()
116 now = plat->base_time; in sandbox_i2c_rtc_set()
[all …]
/u-boot/drivers/serial/
A Dserial_mt7620.c80 writel(quot, &plat->regs->dl); in _mt7620_serial_setbrg()
102 writel(ch, &plat->regs->thr); in mt7620_serial_putc()
117 return readl(&plat->regs->rbr); in mt7620_serial_getc()
135 plat->regs = (void __iomem *)KSEG1ADDR(plat->dtplat.reg[0]); in mt7620_serial_probe()
136 plat->clock = plat->dtplat.clock_frequency; in mt7620_serial_probe()
140 writel(0, &plat->regs->ier); in mt7620_serial_probe()
161 if (!plat->regs) { in mt7620_serial_of_to_plat()
170 plat->clock = err; in mt7620_serial_of_to_plat()
176 if (!plat->clock) in mt7620_serial_of_to_plat()
179 if (!plat->clock) { in mt7620_serial_of_to_plat()
[all …]
A Dserial_rockchip.c18 struct ns16550_plat plat; member
24 struct ns16550_plat plat; member
31 struct rockchip_uart_plat *plat = dev_get_plat(dev); in rockchip_serial_probe() local
34 plat->plat.base = plat->dtplat.reg[0]; in rockchip_serial_probe()
35 plat->plat.reg_shift = plat->dtplat.reg_shift; in rockchip_serial_probe()
36 plat->plat.clock = plat->dtplat.clock_frequency; in rockchip_serial_probe()
37 plat->plat.fcr = UART_FCR_DEFVAL; in rockchip_serial_probe()
38 dev_set_plat(dev, &plat->plat); in rockchip_serial_probe()
A Dserial_lpuart.c417 if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 || in _lpuart32_serial_init()
435 if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 || in lpuart_serial_setbrg()
436 plat->devtype == DEV_IMXRT) in lpuart_serial_setbrg()
462 _lpuart32_serial_putc(plat, c); in lpuart_serial_putc()
464 _lpuart_serial_putc(plat, c); in lpuart_serial_putc()
526 plat->reg = (void *)addr; in lpuart_serial_of_to_plat()
533 plat->devtype = DEV_LS1021A; in lpuart_serial_of_to_plat()
535 plat->devtype = DEV_MX7ULP; in lpuart_serial_of_to_plat()
537 plat->devtype = DEV_VF610; in lpuart_serial_of_to_plat()
539 plat->devtype = DEV_IMX8; in lpuart_serial_of_to_plat()
[all …]
/u-boot/drivers/usb/host/
A Ddwc3-sti-glue.c49 val = readl(plat->syscfg_base + plat->syscfg_offset); in sti_dwc3_glue_drd_init()
53 switch (plat->mode) { in sti_dwc3_glue_drd_init()
76 writel(val, plat->syscfg_base + plat->syscfg_offset); in sti_dwc3_glue_drd_init()
119 plat->glue_base = reg[0]; in sti_dwc3_glue_of_to_plat()
120 plat->syscfg_offset = reg[2]; in sti_dwc3_glue_of_to_plat()
170 plat->mode = usb_get_dr_mode(dwc3_node); in sti_dwc3_glue_bind()
171 if (plat->mode == USB_DR_MODE_UNKNOWN) in sti_dwc3_glue_bind()
173 plat->mode = USB_DR_MODE_HOST; in sti_dwc3_glue_bind()
196 ret = sti_dwc3_glue_drd_init(plat); in sti_dwc3_glue_probe()
200 sti_dwc3_glue_init(plat); in sti_dwc3_glue_probe()
[all …]
A Dxhci-brcm.c33 struct brcm_xhci_plat *plat = dev_get_plat(dev); in xhci_brcm_probe() local
38 if (!plat) { in xhci_brcm_probe()
49 plat->hc_base = hcd; in xhci_brcm_probe()
51 hcor = (struct xhci_hcor *)(plat->hc_base + len); in xhci_brcm_probe()
54 plat->awcache = readl(plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA); in xhci_brcm_probe()
55 plat->arcache = readl(plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA); in xhci_brcm_probe()
58 clrsetbits_le32(plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA, in xhci_brcm_probe()
62 clrsetbits_le32(plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA, in xhci_brcm_probe()
74 struct brcm_xhci_plat *plat = dev_get_plat(dev); in xhci_brcm_deregister() local
77 writel(plat->awcache, plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA); in xhci_brcm_deregister()
[all …]
/u-boot/drivers/spi/
A Dcadence_qspi.c34 plat->ref_clk_hz, hz); in cadence_spi_write_speed()
38 plat->tshsl_ns, plat->tsd2d_ns, in cadence_spi_write_speed()
39 plat->tchsh_ns, plat->tslch_ns); in cadence_spi_write_speed()
137 if (hz > plat->max_hz) in cadence_spi_set_speed()
138 hz = plat->max_hz; in cadence_spi_set_speed()
188 return plat->ref_clk_hz; in cadence_spi_probe()
225 if (plat->use_dac_mode) in cadence_spi_set_mode()
292 &plat->ahbsize); in cadence_spi_of_to_plat()
300 if (plat->ahbsize >= SZ_8M) in cadence_spi_of_to_plat()
325 __func__, plat->regbase, plat->ahbbase, plat->max_hz, in cadence_spi_of_to_plat()
[all …]
/u-boot/drivers/cpu/
A Dimx8_cpu.c62 plat->cpu_rsrc = SC_R_A35; in set_core_data()
63 plat->name = "A35"; in set_core_data()
65 plat->cpu_rsrc = SC_R_A53; in set_core_data()
66 plat->name = "A53"; in set_core_data()
68 plat->cpu_rsrc = SC_R_A72; in set_core_data()
69 plat->name = "A72"; in set_core_data()
71 plat->cpu_rsrc = SC_R_A53; in set_core_data()
72 plat->name = "?"; in set_core_data()
83 if (plat->cpu_rsrc == SC_R_A72) in cpu_imx_get_temp()
113 plat->type, plat->rev, plat->name, plat->freq_mhz); in cpu_imx_get_desc()
[all …]
/u-boot/drivers/video/
A Dsandbox_sdl.c28 struct sandbox_sdl_plat *plat = dev_get_plat(dev); in sandbox_sdl_probe() local
33 ret = sandbox_sdl_init_display(plat->xres, plat->yres, plat->bpix, in sandbox_sdl_probe()
39 uc_priv->xsize = plat->xres; in sandbox_sdl_probe()
40 uc_priv->ysize = plat->yres; in sandbox_sdl_probe()
41 uc_priv->bpix = plat->bpix; in sandbox_sdl_probe()
42 uc_priv->rot = plat->rot; in sandbox_sdl_probe()
43 uc_priv->vidconsole_drv_name = plat->vidconsole_drv_name; in sandbox_sdl_probe()
44 uc_priv->font_size = plat->font_size; in sandbox_sdl_probe()
54 struct sandbox_sdl_plat *plat = dev_get_plat(dev); in sandbox_sdl_bind() local
60 plat->rot = dev_read_u32_default(dev, "rotate", 0); in sandbox_sdl_bind()
[all …]
/u-boot/drivers/cache/
A Dcache-v5l2.c77 struct v5l2_plat *plat = dev_get_plat(dev); in v5l2_enable() local
114 plat->regs = regs; in v5l2_of_to_plat()
116 plat->iprefetch = -EINVAL; in v5l2_of_to_plat()
117 plat->dprefetch = -EINVAL; in v5l2_of_to_plat()
118 plat->tram_ctl[0] = -EINVAL; in v5l2_of_to_plat()
119 plat->dram_ctl[0] = -EINVAL; in v5l2_of_to_plat()
135 struct l2cache *regs = plat->regs; in v5l2_probe()
143 if (plat->iprefetch != -EINVAL) { in v5l2_probe()
148 if (plat->dprefetch != -EINVAL) { in v5l2_probe()
153 if (plat->tram_ctl[0] != -EINVAL) { in v5l2_probe()
[all …]
/u-boot/drivers/mmc/
A Dam654_sdhci.c238 am654_sdhci_write_itapdly(plat, plat->itap_del_sel[mode]); in am654_sdhci_setup_delay_chain()
288 plat->clkbuf_sel); in am654_sdhci_set_ios_post()
303 if (plat->flags & DLL_CALIB) { in am654_sdhci_init()
322 if (plat->non_removable) in am654_sdhci_init()
352 am654_sdhci_init(plat); in am654_sdhci_deferred_probe()
453 plat->clkbuf_sel); in j721e_4bit_sdhci_set_ios_post()
487 &plat->otap_del_sel[0]); in sdhci_am654_get_otap_delay()
496 &plat->otap_del_sel[i]); in sdhci_am654_get_otap_delay()
541 host->mmc = &plat->mmc; in am654_sdhci_probe()
629 plat->flags = drv_data->flags; in am654_sdhci_bind()
[all …]
/u-boot/drivers/watchdog/
A Dxilinx_tb_wdt.c37 struct xlnx_wdt_plat *plat = dev_get_plat(dev); in xlnx_wdt_reset() local
42 reg = readl(&plat->regs->twcsr0); in xlnx_wdt_reset()
54 struct xlnx_wdt_plat *plat = dev_get_plat(dev); in xlnx_wdt_stop() local
56 if (plat->enable_once) { in xlnx_wdt_stop()
62 reg = readl(&plat->regs->twcsr0); in xlnx_wdt_stop()
74 struct xlnx_wdt_plat *plat = dev_get_plat(dev); in xlnx_wdt_start() local
79 &plat->regs->twcsr0); in xlnx_wdt_start()
81 writel(XWT_CSRX_EWDT2_MASK, &plat->regs->twcsr1); in xlnx_wdt_start()
95 struct xlnx_wdt_plat *plat = dev_get_plat(dev); in xlnx_wdt_of_to_plat() local
98 if (IS_ERR(plat->regs)) in xlnx_wdt_of_to_plat()
[all …]
/u-boot/arch/x86/cpu/broadwell/
A Dsata.c60 reg16 |= 0x8000 | plat->port_map; in broadwell_sata_init()
78 reg32 |= (plat->port_map ^ 0xf) << 24; in broadwell_sata_init()
79 reg32 |= (plat->devslp_mux & 1) << 15; in broadwell_sata_init()
93 writel(plat->port_map, abar + 0x0c); in broadwell_sata_init()
98 if (plat->devslp_disable) { in broadwell_sata_init()
123 if (plat->port0_gen3_tx) in broadwell_sata_init()
127 (plat->port0_gen3_tx & in broadwell_sata_init()
131 if (plat->port1_gen3_tx) in broadwell_sata_init()
135 (plat->port1_gen3_tx & in broadwell_sata_init()
140 if (plat->port0_gen3_dtle) { in broadwell_sata_init()
[all …]
/u-boot/drivers/misc/
A Di2c_eeprom_emul.c41 plat->test_mode = mode; in sandbox_i2c_eeprom_set_test_mode()
48 plat->offset_len = offset_len; in sandbox_i2c_eeprom_set_offset_len()
56 plat->chip_addr_offset_mask = mask; in sandbox_i2c_eeprom_set_chip_addr_offset_mask()
90 if (!plat->size) in sandbox_i2c_eeprom_xfer()
100 if (offset + len > plat->size) { in sandbox_i2c_eeprom_xfer()
132 if (offset + len > plat->size) { in sandbox_i2c_eeprom_xfer()
158 if (!plat->filename) { in sandbox_i2c_eeprom_of_to_plat()
163 plat->test_mode = SIE_TEST_MODE_NONE; in sandbox_i2c_eeprom_of_to_plat()
164 plat->offset_len = 1; in sandbox_i2c_eeprom_of_to_plat()
165 plat->chip_addr_offset_mask = 0; in sandbox_i2c_eeprom_of_to_plat()
[all …]
/u-boot/drivers/ddr/altera/
A Dsdram_s10.c155 emif_reset(plat); in sdram_mmr_init_full()
164 u32 ctrlcfg0 = hmc_readl(plat, CTRLCFG0); in sdram_mmr_init_full()
165 u32 ctrlcfg1 = hmc_readl(plat, CTRLCFG1); in sdram_mmr_init_full()
168 u32 caltim0 = hmc_readl(plat, CALTIMING0); in sdram_mmr_init_full()
169 u32 caltim1 = hmc_readl(plat, CALTIMING1); in sdram_mmr_init_full()
208 hmc_ecc_writel(plat, hmc_readl(plat, DRAMADDRW), DRAMADDRWIDTH); in sdram_mmr_init_full()
302 setbits_le32(plat->hmc + ECCCTRL1, in sdram_mmr_init_full()
306 clrbits_le32(plat->hmc + ECCCTRL1, in sdram_mmr_init_full()
309 setbits_le32(plat->hmc + ECCCTRL2, in sdram_mmr_init_full()
318 clrbits_le32(plat->hmc + ECCCTRL1, in sdram_mmr_init_full()
[all …]

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