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Searched refs:pll8_cfg (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-sunxi/
A Dclock_sun8i_a83t.c27 writel(PLL8_CFG_DEFAULT, &ccm->pll8_cfg); in clock_init_safe()
28 writel(readl(&ccm->pll8_cfg) | (0x1 << 31), &ccm->pll8_cfg); in clock_init_safe()
/u-boot/arch/arm/include/asm/arch-sunxi/
A Dclock_sun8i_a83t.h31 u32 pll8_cfg; /* 0x44 pll8 hsic control */ member
A Dclock_sun6i.h28 u32 pll8_cfg; /* 0x38 pll8 control */ member

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