Home
last modified time | relevance | path

Searched refs:pll_con (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/rockchip/
A Dclk_rk3328.c214 u32 *pll_con; in rkclk_set_pll() local
217 pll_con = NULL; in rkclk_set_pll()
221 pll_con = cru->apll_con; in rkclk_set_pll()
225 pll_con = cru->dpll_con; in rkclk_set_pll()
229 pll_con = cru->cpll_con; in rkclk_set_pll()
233 pll_con = cru->gpll_con; in rkclk_set_pll()
237 pll_con = cru->npll_con; in rkclk_set_pll()
251 pll_con, div->fbdiv, div->refdiv, div->postdiv1, in rkclk_set_pll()
264 rk_clrsetreg(&pll_con[1], PLL_DSMPD_MASK, in rkclk_set_pll()
267 rk_clrsetreg(&pll_con[0], in rkclk_set_pll()
[all …]
A Dclk_rk3399.c325 static void rkclk_set_pll(u32 *pll_con, const struct pll_div *div) in rkclk_set_pll() argument
333 pll_con, div->fbdiv, div->refdiv, div->postdiv1, in rkclk_set_pll()
343 rk_clrsetreg(&pll_con[3], PLL_MODE_MASK, in rkclk_set_pll()
347 rk_clrsetreg(&pll_con[3], PLL_DSMPD_MASK, in rkclk_set_pll()
350 rk_clrsetreg(&pll_con[0], PLL_FBDIV_MASK, in rkclk_set_pll()
352 rk_clrsetreg(&pll_con[1], in rkclk_set_pll()
360 while (!(readl(&pll_con[2]) & (1 << PLL_LOCK_STATUS_SHIFT))) in rkclk_set_pll()
364 rk_clrsetreg(&pll_con[3], PLL_MODE_MASK, in rkclk_set_pll()

Completed in 7 milliseconds