Searched refs:pll_con1 (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/clk/exynos/
A D	clk-pll.c	21 unsigned long pll_con1 = readl(con1); in pll145x_get_rate() local 25 mdiv = (pll_con1 >> PLL145X_MDIV_SHIFT) & PLL145X_MDIV_MASK; in pll145x_get_rate() 26 pdiv = (pll_con1 >> PLL145X_PDIV_SHIFT) & PLL145X_PDIV_MASK; in pll145x_get_rate() 27 sdiv = (pll_con1 >> PLL145X_SDIV_SHIFT) & PLL145X_SDIV_MASK; in pll145x_get_rate()

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