Searched refs:pll_ctrl (Results 1 – 11 of 11) sorted by relevance
/u-boot/drivers/usb/host/ |
A D | ehci-vf.c | 65 void __iomem *pll_ctrl; in usb_power_config() local 69 pll_ctrl = &anadig->pll3_ctrl; in usb_power_config() 70 clrbits_le32(pll_ctrl, ANADIG_PLL3_CTRL_BYPASS); in usb_power_config() 71 setbits_le32(pll_ctrl, ANADIG_PLL3_CTRL_ENABLE in usb_power_config() 76 pll_ctrl = &anadig->pll7_ctrl; in usb_power_config() 77 clrbits_le32(pll_ctrl, ANADIG_PLL7_CTRL_BYPASS); in usb_power_config() 78 setbits_le32(pll_ctrl, ANADIG_PLL7_CTRL_ENABLE in usb_power_config()
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/u-boot/arch/m68k/include/asm/ |
A D | immap_5282.h | 89 typedef struct pll_ctrl { struct
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A D | immap_520x.h | 176 typedef struct pll_ctrl { struct
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A D | immap_5235.h | 206 typedef struct pll_ctrl { struct
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A D | immap_5301x.h | 296 typedef struct pll_ctrl { struct
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A D | immap_5275.h | 340 typedef struct pll_ctrl { struct
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A D | immap_5329.h | 374 typedef struct pll_ctrl { struct
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/u-boot/drivers/video/sunxi/ |
A D | sunxi_display.c | 124 &hdmi->pll_ctrl); in sunxi_hdmi_hpd_detect() 747 writel(SUNXI_HDMI_PLL_CTRL, &hdmi->pll_ctrl); 751 clrsetbits_le32(&hdmi->pll_ctrl, SUNXI_HDMI_PLL_CTRL_DIV_MASK,
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/u-boot/arch/arm/include/asm/arch-sunxi/ |
A D | display.h | 178 u32 pll_ctrl; /* 0x208 */ member
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/u-boot/arch/arm/dts/ |
A D | dra7.dtsi | 1386 <0x4A096800 0x40>; /* pll_ctrl */ 1387 reg-names = "phy_rx", "phy_tx", "pll_ctrl"; 1494 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
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A D | omap5-l4.dtsi | 480 reg-names = "phy_rx", "phy_tx", "pll_ctrl"; 526 <0x6800 0x40>; /* pll_ctrl */ 527 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
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