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Searched refs:pll_div_ctl0 (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/clk/imx/
A Dclk-pll14xx.c89 u32 mdiv, pdiv, sdiv, pll_div_ctl0, pll_div_ctl1; in clk_pll1443x_recalc_rate() local
92 pll_div_ctl0 = readl(pll->base + 4); in clk_pll1443x_recalc_rate()
94 mdiv = (pll_div_ctl0 & MDIV_MASK) >> MDIV_SHIFT; in clk_pll1443x_recalc_rate()
95 pdiv = (pll_div_ctl0 & PDIV_MASK) >> PDIV_SHIFT; in clk_pll1443x_recalc_rate()
96 sdiv = (pll_div_ctl0 & SDIV_MASK) >> SDIV_SHIFT; in clk_pll1443x_recalc_rate()
120 u32 pll_div_ctl0, u32 pll_div_ctl1) in clk_pll1443x_mpk_change() argument
124 old_mdiv = (pll_div_ctl0 & MDIV_MASK) >> MDIV_SHIFT; in clk_pll1443x_mpk_change()
125 old_pdiv = (pll_div_ctl0 & PDIV_MASK) >> PDIV_SHIFT; in clk_pll1443x_mpk_change()
133 u32 pll_div_ctl0, u32 pll_div_ctl1) in clk_pll1443x_mp_change() argument
137 old_mdiv = (pll_div_ctl0 & MDIV_MASK) >> MDIV_SHIFT; in clk_pll1443x_mp_change()
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