Home
last modified time | relevance | path

Searched refs:pll_p (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/
A Dstm32_rcc.h29 u8 pll_p; member
/u-boot/drivers/clk/
A Dclk_stm32f.c110 .pll_p = 2,
124 .pll_p = 2,
180 ((sys_pll_psc->pll_p >> 1) - 1) << RCC_PLLCFGR_PLLP_SHIFT); in configure_clocks()
/u-boot/doc/device-tree-bindings/clock/
A Dnvidia,tegra20-car.txt152 121 pll_p
/u-boot/arch/arm/dts/
A Dtegra124.dtsi990 clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";

Completed in 6 milliseconds