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Searched refs:pllcr0 (Results 1 – 12 of 12) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
A Dfsl_corenet2_serdes.c233 pll_status = in_be32(&srds_regs->bank[pll_num].pllcr0); in serdes_init()
277 pll_cr0 = in_be32(&srds_regs->bank[pll_num].pllcr0); in serdes_init()
278 out_be32(&srds_regs->bank[pll_num].pllcr0, in serdes_init()
304 pll_cr0 = in_be32(&srds_regs->bank[pll_num].pllcr0); in serdes_init()
305 out_be32(&srds_regs->bank[pll_num].pllcr0, pll_cr0 | in serdes_init()
311 pll_cr0 = in_be32(&srds_regs->bank[pll_num].pllcr0); in serdes_init()
312 out_be32(&srds_regs->bank[pll_num].pllcr0, pll_cr0 & in serdes_init()
320 pll_status = in_be32(&srds_regs->bank[pll_num].pllcr0); in serdes_init()
A Dfsl_corenet_serdes.c404 clrsetbits_be32(&regs->bank[FSL_SRDS_BANK_3].pllcr0, in p4080_erratum_serdes8()
407 clrsetbits_be32(&regs->bank[FSL_SRDS_BANK_3].pllcr0, in p4080_erratum_serdes8()
683 setbits_be32(&srds_regs->bank[bank].pllcr0, in fsl_serdes_init()
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dfsl_lsch2_serdes.c322 reg = in_be32(&serdes1_base->bank[i].pllcr0); in setup_serdes_volt()
341 reg = in_be32(&serdes2_base->bank[i].pllcr0); in setup_serdes_volt()
382 reg = in_be32(&serdes1_base->bank[i].pllcr0); in setup_serdes_volt()
393 reg = in_be32(&serdes2_base->bank[i].pllcr0); in setup_serdes_volt()
A Dfsl_lsch3_serdes.c351 reg = in_le32(&serdes_base->bank[i].pllcr0); in do_pll_reset_done()
383 reg = in_le32(&serdes_base->bank[i].pllcr0); in do_pll_lock()
/u-boot/board/keymile/kmp204x/
A Dkmp204x.c147 u32 actual = in_be32(&regs->bank[i].pllcr0); in misc_init_r()
/u-boot/board/freescale/corenet_ds/
A Dcorenet_ds.c179 u32 expected = srds_regs->bank[i].pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK; in misc_init_r()
/u-boot/board/freescale/p2041rdb/
A Dp2041rdb.c206 u32 expected = in_be32(&regs->bank[i].pllcr0); in misc_init_r()
/u-boot/board/keymile/kmcent2/
A Dkmcent2.c231 u32 actual = in_be32(&regs->bank[USED_SRDS_BANK].pllcr0); in misc_init_r()
/u-boot/arch/arm/include/asm/arch-ls102xa/
A Dimmap_ls102xa.h345 u32 pllcr0; /* PLL Control Register 0 */ member
/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dimmap_lsch3.h561 u32 pllcr0; /* PLL Control Register 0 */ member
A Dimmap_lsch2.h573 u32 pllcr0; /* PLL Control Register 0 */ member
/u-boot/arch/powerpc/include/asm/
A Dimmap_85xx.h2535 u32 pllcr0; /* PLL Control Register 0 */ member
2619 u32 pllcr0; /* PLL Control Register 0 */ member

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