Searched refs:pllm_reg (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/clk/altera/
A D	clk-agilex.c	347 u32 pllglob_reg, u32 pllm_reg) in clk_get_vco_clk_hz() argument 371 mdiv = CM_REG_READL(plat, pllm_reg) & CLKMGR_PLLM_MDIV_MASK; in clk_get_vco_clk_hz()

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