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Searched refs:pllout (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_imx8mq.c24 u32 pll_cfg0, pll_cfg1, pllout; in decode_frac_pll() local
76 pllout = pll_refclk / (divr_val + 1) * 8 * divf_val / in decode_frac_pll()
79 return pllout / (pllout_div + 1); in decode_frac_pll()
90 u32 pllout; in decode_sscg_pll() local
245 pllout = pll_refclk / (divr1 + 1) * sse * (divf1 + 1) / in decode_sscg_pll()
248 return pllout / (pllout_div + 1) / div; in decode_sscg_pll()
/u-boot/arch/arm/mach-tegra/
A Dclock.c266 int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout, unsigned rate) in clock_set_pllout() argument
274 if (pllout + 1 > pll_num_clkouts[clkid]) in clock_set_pllout()
283 if (pllout == PLL_OUT2 || pllout == PLL_OUT4) in clock_set_pllout()
288 clrsetbits_le32(&pll->pll_out[pllout >> 1], in clock_set_pllout()
/u-boot/arch/arm/include/asm/arch-tegra/
A Dclock.h75 int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout,
/u-boot/arch/arm/dts/
A Dda850.dtsi95 pll0_pllout: pllout {

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