Searched refs:pmc_update_bits (Results 1 – 10 of 10) sorted by relevance
| /u-boot/drivers/clk/at91/ |
| A D | clk-sam9x60-pll.c | 128 pmc_update_bits(base, AT91_PMC_PLL_UPDT, in sam9x60_frac_pll_set_rate()
177 pmc_update_bits(base, AT91_PMC_PLL_UPDT, in sam9x60_frac_pll_enable()
202 pmc_update_bits(base, AT91_PMC_PLL_UPDT, in sam9x60_frac_pll_enable()
208 pmc_update_bits(base, AT91_PMC_PLL_CTRL0, in sam9x60_frac_pll_enable()
212 pmc_update_bits(base, AT91_PMC_PLL_UPDT, in sam9x60_frac_pll_enable()
232 pmc_update_bits(base, AT91_PMC_PLL_CTRL0, in sam9x60_frac_pll_disable()
236 pmc_update_bits(base, AT91_PMC_PLL_ACR, in sam9x60_frac_pll_disable()
240 pmc_update_bits(base, AT91_PMC_PLL_UPDT, in sam9x60_frac_pll_disable()
272 pmc_update_bits(base, AT91_PMC_PLL_UPDT, in sam9x60_div_pll_enable()
295 pmc_update_bits(base, AT91_PMC_PLL_UPDT, in sam9x60_div_pll_disable()
[all …]
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| A D | clk-generic.c | 43 pmc_update_bits(gck->base, gck->layout->offset, in clk_gck_enable()
56 pmc_update_bits(gck->base, gck->layout->offset, in clk_gck_disable()
80 pmc_update_bits(gck->base, gck->layout->offset, in clk_gck_set_parent()
106 pmc_update_bits(gck->base, gck->layout->offset, in clk_gck_set_rate()
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| A D | clk-master.c | 176 pmc_update_bits(master->base, PMC_MCR, in clk_sama7g5_master_set_parent()
188 pmc_update_bits(master->base, PMC_MCR, in clk_sama7g5_master_enable()
200 pmc_update_bits(master->base, PMC_MCR, in clk_sama7g5_master_disable()
228 pmc_update_bits(master->base, PMC_MCR, in clk_sama7g5_master_set_rate()
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| A D | clk-peripheral.c | 132 pmc_update_bits(periph->base, periph->layout->offset, in clk_sam9x5_peripheral_enable()
148 pmc_update_bits(periph->base, periph->layout->offset, in clk_sam9x5_peripheral_disable()
200 pmc_update_bits(periph->base, periph->layout->offset, in clk_sam9x5_peripheral_set_rate()
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| A D | clk-utmi.c | 92 pmc_update_bits(utmi->base, AT91_CKGR_UCKR, uckr, uckr); in clk_utmi_enable()
106 pmc_update_bits(utmi->base, AT91_CKGR_UCKR, AT91_PMC_UPLLEN, 0); in clk_utmi_disable()
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| A D | clk-main.c | 69 pmc_update_bits(reg, AT91_CKGR_MOR, in main_rc_enable()
95 pmc_update_bits(reg, AT91_CKGR_MOR, MOR_KEY_MASK | AT91_PMC_MOSCRCEN, in main_rc_disable()
211 pmc_update_bits(reg, AT91_CKGR_MOR, in at91_clk_main_osc()
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| A D | clk-programmable.c | 83 pmc_update_bits(prog->base, AT91_PMC_PCKR(prog->id), mask, index); in clk_programmable_set_parent()
114 pmc_update_bits(prog->base, AT91_PMC_PCKR(prog->id), in clk_programmable_set_rate()
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| A D | pmc.c | 118 void pmc_update_bits(void __iomem *base, unsigned int off, in pmc_update_bits() function
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| A D | sckc.c | 63 pmc_update_bits(sckc->reg, 0, AT91_OSC_SEL, (i << AT91_OSC_SEL_SHIFT)); in sam9x60_td_slck_set_parent()
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| A D | pmc.h | 144 void pmc_update_bits(void __iomem *base, unsigned int off, unsigned int mask,
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