Searched refs:pmc_write (Results 1 – 9 of 9) sorted by relevance
| /u-boot/drivers/clk/at91/ |
| A D | clk-generic.c | 41 pmc_write(gck->base, gck->layout->offset, in clk_gck_enable()
54 pmc_write(gck->base, gck->layout->offset, in clk_gck_disable()
78 pmc_write(gck->base, gck->layout->offset, in clk_gck_set_parent()
104 pmc_write(gck->base, gck->layout->offset, in clk_gck_set_rate()
123 pmc_write(gck->base, gck->layout->offset, in clk_gck_get_rate()
173 pmc_write(gck->base, gck->layout->offset, in at91_clk_register_generic()
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| A D | clk-peripheral.c | 60 pmc_write(periph->base, offset, PERIPHERAL_MASK(id)); in clk_peripheral_enable()
76 pmc_write(periph->base, offset, PERIPHERAL_MASK(id)); in clk_peripheral_disable()
130 pmc_write(periph->base, periph->layout->offset, in clk_sam9x5_peripheral_enable()
146 pmc_write(periph->base, periph->layout->offset, in clk_sam9x5_peripheral_disable()
164 pmc_write(periph->base, periph->layout->offset, in clk_sam9x5_peripheral_get_rate()
198 pmc_write(periph->base, periph->layout->offset, in clk_sam9x5_peripheral_set_rate()
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| A D | clk-master.c | 175 pmc_write(master->base, PMC_MCR, PMC_MCR_ID(master->id)); in clk_sama7g5_master_set_parent()
187 pmc_write(master->base, PMC_MCR, PMC_MCR_ID(master->id)); in clk_sama7g5_master_enable()
199 pmc_write(master->base, PMC_MCR, master->id); in clk_sama7g5_master_disable()
227 pmc_write(master->base, PMC_MCR, master->id); in clk_sama7g5_master_set_rate()
246 pmc_write(master->base, PMC_MCR, master->id); in clk_sama7g5_master_get_rate()
291 pmc_write(master->base, PMC_MCR, master->id); in at91_clk_sama7g5_register_master()
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| A D | clk-system.c | 51 pmc_write(sys->base, AT91_PMC_SCER, 1 << sys->id); in clk_system_enable()
68 pmc_write(sys->base, AT91_PMC_SCDR, 1 << sys->id); in clk_system_disable()
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| A D | clk-main.c | 155 pmc_write(reg, AT91_CKGR_MOR, val); in clk_main_osc_enable()
182 pmc_write(reg, AT91_CKGR_MOR, val | AT91_PMC_KEY); in clk_main_osc_disable()
331 pmc_write(reg, AT91_CKGR_MOR, tmp | AT91_PMC_MOSCSEL); in clk_sam9x5_main_set_parent()
333 pmc_write(reg, AT91_CKGR_MOR, tmp & ~AT91_PMC_MOSCSEL); in clk_sam9x5_main_set_parent()
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| A D | clk-sam9x60-pll.c | 124 pmc_write(base, AT91_PMC_PLL_CTRL1, in sam9x60_frac_pll_set_rate()
187 pmc_write(base, AT91_PMC_PLL_ACR, val); in sam9x60_frac_pll_enable()
192 pmc_write(base, AT91_PMC_PLL_ACR, val); in sam9x60_frac_pll_enable()
198 pmc_write(base, AT91_PMC_PLL_ACR, val); in sam9x60_frac_pll_enable()
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| A D | pmc.c | 103 void pmc_write(void __iomem *base, unsigned int off, unsigned int val) in pmc_write() function
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| A D | clk-utmi.c | 192 pmc_write(utmi->base, AT91_PMC_XTALF, val); in clk_utmi_sama7g5_enable()
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| A D | pmc.h | 143 void pmc_write(void __iomem *base, unsigned int off, unsigned int val);
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