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Searched refs:port (Results 1 – 25 of 891) sorted by relevance

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/u-boot/drivers/misc/
A Dsmsc_sio1007.c13 outb(reg, port); in sio1007_read()
15 return inb(port + 1); in sio1007_read()
20 outb(reg, port); in sio1007_write()
21 outb(val, port + 1); in sio1007_write()
26 sio1007_write(port, reg, (sio1007_read(port, reg) & ~clr) | set); in sio1007_clrsetbits()
35 outb(0x55, port); in sio1007_enable_serial()
49 outb(0xaa, port); in sio1007_enable_serial()
55 outb(0x55, port); in sio1007_enable_runtime()
64 outb(0xaa, port); in sio1007_enable_runtime()
79 outb(0x55, port); in sio1007_gpio_config()
[all …]
/u-boot/drivers/serial/
A Dserial_sh.c50 sci_out(port, SCSCR , SCSCR_INIT(port)); in sh_serial_init_generic()
51 sci_out(port, SCSCR , SCSCR_INIT(port)); in sh_serial_init_generic()
55 sci_in(port, SCFCR); in sh_serial_init_generic()
77 sci_in(port, SCxSR); in handle_error()
78 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); in handle_error()
79 sci_in(port, SCLSR); in handle_error()
86 if (!(sci_in(port, SCxSR) & SCxSR_TEND(port))) in serial_raw_putc()
90 sci_out(port, SCxSR, sci_in(port, SCxSR) & ~SCxSR_TEND(port)); in serial_raw_putc()
118 if (sci_in(port, SCLSR) & SCxSR_ORER(port)) in serial_getc_check()
137 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); in sh_serial_getc_generic()
[all …]
A Dserial_sh.h30 # define SCSCR_INIT(port) (((port)->type == PORT_SCI) ? \ argument
100 # define SCSCR_INIT(port) (port->clk_mode == EXT_CLK ? 0x32 : 0x30) argument
202 # define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) argument
203 # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) argument
204 # define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf) argument
205 # define SCxSR_BREAK_CLEAR(port) (sci_in(port, SCxSR) & 0xffe3) argument
207 # define SCxSR_RDxF_CLEAR(port) (((port)->type == PORT_SCI) ? 0xbc : 0x00fc) argument
248 if (port->type == PORT_SCIF || port->type == PORT_SCIFB) {\
256 if (port->type == PORT_SCIF || port->type == PORT_SCIFB) {\
424 #define sci_in(port, reg) sci_##reg##_in(port) argument
[all …]
A Dserial_ns16550.c73 #define PORT serial_ports[port-1]
87 serial_setbrg_dev(port); \
91 return serial_getc_dev(port); \
95 return serial_tstc_dev(port); \
99 serial_putc_dev(port, c); \
103 serial_puts_dev(port, s); \
112 .getc = eserial##port##_getc, \
113 .tstc = eserial##port##_tstc, \
114 .putc = eserial##port##_putc, \
115 .puts = eserial##port##_puts, \
[all …]
/u-boot/arch/powerpc/cpu/mpc8xxx/
A Dsrio.c88 .port[port].pccsr) >> 27) & 0x7; in srio_erratum_a004034()
107 .port[port].pescsr) & 0x2) { in srio_erratum_a004034()
123 .port[port].pccsr, in srio_erratum_a004034()
189 .port[port].pccsr, in srio_erratum_a004034()
196 .port[port].pccsr) >> 27) & 0x7; in srio_erratum_a004034()
198 .port[port].pescsr) & 0x2) { in srio_erratum_a004034()
219 .port[port].pescsr), 0xffffffff); in srio_erratum_a004034()
221 .port[port].edcsr), 0); in srio_erratum_a004034()
364 out_be32((void *)&srio->atmu.port[port - 1] in srio_boot_master_release_slave()
366 out_be32((void *)&srio->atmu.port[port - 1] in srio_boot_master_release_slave()
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/u-boot/arch/arm/cpu/arm926ejs/mx27/
A Dgeneric.c220 &regs->port[port].puen); in imx_gpio_mode()
223 &regs->port[port].puen); in imx_gpio_mode()
238 &regs->port[port].gpr); in imx_gpio_mode()
241 &regs->port[port].gpr); in imx_gpio_mode()
247 &regs->port[port].gius); in imx_gpio_mode()
250 &regs->port[port].gius); in imx_gpio_mode()
261 &regs->port[port].iconfa1); in imx_gpio_mode()
263 &regs->port[port].iconfa1); in imx_gpio_mode()
265 &regs->port[port].iconfb1); in imx_gpio_mode()
267 &regs->port[port].iconfb1); in imx_gpio_mode()
[all …]
/u-boot/arch/mips/mach-octeon/include/
A Dmangle-port.h21 # define __swizzle_addr_b(port) (port) argument
22 # define __swizzle_addr_w(port) (port) argument
23 # define __swizzle_addr_l(port) (port) argument
24 # define __swizzle_addr_q(port) (port) argument
36 # define __swizzle_addr_b(port) \ argument
37 (__should_swizzle_addr(port) ? (port) ^ 7 : (port))
38 # define __swizzle_addr_w(port) \ argument
39 (__should_swizzle_addr(port) ? (port) ^ 6 : (port))
40 # define __swizzle_addr_l(port) \ argument
41 (__should_swizzle_addr(port) ? (port) ^ 4 : (port))
[all …]
/u-boot/drivers/bios_emulator/
A Dbesys.c249 #define IS_TIMER_PORT(port) (0x40 <= port && port <= 0x43) argument
250 #define IS_CMOS_PORT(port) (0x70 <= port && port <= 0x71) argument
252 #define IS_VGA_PORT(port) (0x3C0 <= port && port <= 0x3DA) argument
253 #define IS_PCI_PORT(port) (0xCF8 <= port && port <= 0xCFF) argument
254 #define IS_SPKR_PORT(port) (port == 0x61) argument
272 switch (port) { in VGA_inpb()
345 switch (port) { in VGA_outpb()
506 && port <= 0xCFF) in PCI_inp()
515 if (port == 0xCF8) in PCI_inp()
546 if (port == 0xCF8) in PCI_outp()
[all …]
A Dbiosemui.h131 #define PM_inpb(port) inb(port+VIDEO_IO_OFFSET) argument
132 #define PM_inpw(port) inw(port+VIDEO_IO_OFFSET) argument
133 #define PM_inpd(port) inl(port+VIDEO_IO_OFFSET) argument
134 #define PM_outpb(port,val) outb(val,port+VIDEO_IO_OFFSET) argument
135 #define PM_outpw(port,val) outw(val,port+VIDEO_IO_OFFSET) argument
138 #define LOG_inpb(port) PM_inpb(port) argument
139 #define LOG_inpw(port) PM_inpw(port) argument
140 #define LOG_inpd(port) PM_inpd(port) argument
141 #define LOG_outpb(port,val) PM_outpb(port,val) argument
142 #define LOG_outpw(port,val) PM_outpw(port,val) argument
[all …]
/u-boot/arch/x86/include/asm/arch-quark/
A Dmsg_port.h44 void msg_port_setup(int op, int port, int reg);
54 u32 msg_port_read(u8 port, u32 reg);
73 u32 msg_port_alt_read(u8 port, u32 reg);
92 u32 msg_port_io_read(u8 port, u32 reg);
109 msg_port_##type##_write(port, reg, \
110 (msg_port_##type##_read(port, reg) \
113 #define msg_port_clrbits(port, reg, clr) \ argument
115 #define msg_port_setbits(port, reg, set) \ argument
120 #define msg_port_alt_clrbits(port, reg, clr) \ argument
127 #define msg_port_io_clrbits(port, reg, clr) \ argument
[all …]
/u-boot/drivers/ata/
A Dsata_sil3114.c64 port[num].dev_mask = 1; in sata_bus_softreset()
67 writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
69 writeb (port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
71 writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
374 u32 port = iobase[5]; in wait_for_irq() local
734 val = readl (port); in sata_bus_probe()
762 val = readl (port); in sata_phy_reset()
776 port[0].ioaddr.altstatus_addr = port[0].ioaddr.ctl_addr = in scan_sata()
784 port[1].ioaddr.altstatus_addr = port[1].ioaddr.ctl_addr = in scan_sata()
792 port[2].ioaddr.altstatus_addr = port[2].ioaddr.ctl_addr = in scan_sata()
[all …]
/u-boot/drivers/xen/
A Devents.c69 clear_evtchn(port); in do_event()
71 if (port >= NR_EVS) { in do_event()
76 action = &ev_actions[port]; in do_event()
91 port); in bind_evtchn()
93 ev_actions[port].data = data; in bind_evtchn()
98 return port; in bind_evtchn()
111 mask_evtchn(port); in unbind_evtchn()
112 clear_evtchn(port); in unbind_evtchn()
116 ev_actions[port].data = NULL; in unbind_evtchn()
119 close.port = port; in unbind_evtchn()
[all …]
/u-boot/arch/arm/mach-mvebu/serdes/axp/
A Dboard_env_spec.h130 #define SATA_BASE_REG(port) (0xA2000 + (port)*0x2000) argument
132 #define SATA_PWR_PLL_CTRL_REG(port) (SATA_BASE_REG(port) + 0x804) argument
133 #define SATA_DIG_LP_ENA_REG(port) (SATA_BASE_REG(port) + 0x88C) argument
134 #define SATA_REF_CLK_SEL_REG(port) (SATA_BASE_REG(port) + 0x918) argument
135 #define SATA_COMPHY_CTRL_REG(port) (SATA_BASE_REG(port) + 0x920) argument
139 #define SATA_GEN_1_SET_0_REG(port) (SATA_BASE_REG(port) + 0x834) argument
140 #define SATA_GEN_1_SET_1_REG(port) (SATA_BASE_REG(port) + 0x838) argument
141 #define SATA_GEN_2_SET_0_REG(port) (SATA_BASE_REG(port) + 0x83C) argument
142 #define SATA_GEN_2_SET_1_REG(port) (SATA_BASE_REG(port) + 0x840) argument
147 #define MV_ETH_REGS_BASE(port) MV_ETH_REGS_OFFSET(port) argument
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/u-boot/arch/m68k/include/asm/
A Dio.h53 #define inb(port) in_8((u8 *)((port)+_IO_BASE)) argument
54 #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) argument
56 #define inw(port) in_be16((u16 *)((port)+_IO_BASE)) argument
57 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) argument
58 #define inl(port) in_be32((u32 *)((port)+_IO_BASE)) argument
59 #define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val)) argument
61 #define inw(port) in_le16((u16 *)((port)+_IO_BASE)) argument
62 #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) argument
63 #define inl(port) in_le32((u32 *)((port)+_IO_BASE)) argument
64 #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val)) argument
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/u-boot/arch/arm/cpu/arm920t/imx/
A Dgeneric.c27 PUEN(port) |= (1<<pin); in imx_gpio_mode()
29 PUEN(port) &= ~(1<<pin); in imx_gpio_mode()
33 DDIR(port) |= 1<<pin; in imx_gpio_mode()
35 DDIR(port) &= ~(1<<pin); in imx_gpio_mode()
39 GPR(port) |= (1<<pin); in imx_gpio_mode()
41 GPR(port) &= ~(1<<pin); in imx_gpio_mode()
45 GIUS(port) |= (1<<pin); in imx_gpio_mode()
54 tmp = OCR1(port); in imx_gpio_mode()
57 OCR1(port) = tmp; in imx_gpio_mode()
64 tmp = OCR2(port); in imx_gpio_mode()
[all …]
/u-boot/drivers/pci/
A Dpcie_mediatek.c272 return port; in mtk_pcie_find_port()
276 return port; in mtk_pcie_find_port()
290 if (!port) { in mtk_pcie_config_read()
309 if (!port) in mtk_pcie_config_write()
327 free(port); in mtk_pcie_port_free()
535 port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL); in mtk_pcie_parse_port()
536 if (!port) in mtk_pcie_parse_port()
541 if (!port->base) in mtk_pcie_parse_port()
557 port->slot = slot; in mtk_pcie_parse_port()
573 port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL); in mtk_pcie_parse_port_v2()
[all …]
/u-boot/board/intel/galileo/
A Dgalileo.c23 u32 base, port, val; in board_assert_perst() local
30 port = base + 0x20; in board_assert_perst()
31 val = inl(port); in board_assert_perst()
33 outl(val, port); in board_assert_perst()
36 port = base + 0x24; in board_assert_perst()
37 val = inl(port); in board_assert_perst()
39 outl(val, port); in board_assert_perst()
43 val = inl(port); in board_assert_perst()
45 outl(val, port); in board_assert_perst()
58 val = inl(port); in board_deassert_perst()
[all …]
/u-boot/arch/xtensa/include/asm/
A Dio.h59 #define inb(port) readb((u8 *)((port))) argument
60 #define outb(val, port) writeb((val), (u8 *)((unsigned long)(port))) argument
61 #define inw(port) readw((u16 *)((port))) argument
62 #define outw(val, port) writew((val), (u16 *)((unsigned long)(port))) argument
63 #define inl(port) readl((u32 *)((port))) argument
66 #define inb_p(port) inb((port)) argument
67 #define outb_p(val, port) outb((val), (port)) argument
68 #define inw_p(port) inw((port)) argument
69 #define outw_p(val, port) outw((val), (port)) argument
70 #define inl_p(port) inl((port)) argument
[all …]
/u-boot/drivers/net/
A Dmvpp2.c83 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port)) argument
1909 for (port = 0; port < MVPP2_MAX_PORTS; port++) { in mvpp2_prs_def_flow_init()
2399 err = mvpp2_prs_mac_da_accept(port->priv, port->id, port->dev_addr, in mvpp2_prs_update_mac_da()
4323 mvpp2_rxq_deinit(port, port->rxqs[queue]); in mvpp2_cleanup_rxqs()
4498 if (!port->init || port->link == 0) { in mvpp2_phy_connect()
4680 rxq->port = port->id; in mvpp2_port_init()
4777 port->first_rxq = port->id * rxq_number; in phy_info_parse()
4779 port->first_rxq = port->id * port->priv->max_port_rxqs; in phy_info_parse()
4823 priv->port_list[port->id] = port; in mvpp2_port_probe()
4866 for (port = 0; port < MVPP2_MAX_PORTS; port++) { in mvpp2_rx_fifo_init()
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/u-boot/drivers/net/fm/
A Dp5020.c21 static int is_device_disabled(enum fm_port port) in is_device_disabled() argument
26 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
29 void fman_disable_port(enum fm_port port) in fman_disable_port() argument
34 if (port == FM1_DTSEC1) in fman_disable_port()
37 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
40 void fman_enable_port(enum fm_port port) in fman_enable_port() argument
44 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
47 phy_interface_t fman_port_enet_if(enum fm_port port) in fman_port_enet_if() argument
52 if (is_device_disabled(port)) in fman_port_enet_if()
55 if ((port == FM1_10GEC1) && (is_serdes_configured(XAUI_FM1))) in fman_port_enet_if()
[all …]
A Dp4080.c25 static int is_device_disabled(enum fm_port port) in is_device_disabled() argument
30 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
33 void fman_disable_port(enum fm_port port) in fman_disable_port() argument
38 if (port == FM1_DTSEC1) in fman_disable_port()
41 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
44 void fman_enable_port(enum fm_port port) in fman_enable_port() argument
48 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
51 phy_interface_t fman_port_enet_if(enum fm_port port) in fman_port_enet_if() argument
56 if (is_device_disabled(port)) in fman_port_enet_if()
59 if ((port == FM1_10GEC1) && (is_serdes_configured(XAUI_FM1))) in fman_port_enet_if()
[all …]
A Dp5040.c27 static int is_device_disabled(enum fm_port port) in is_device_disabled() argument
32 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
35 void fman_disable_port(enum fm_port port) in fman_disable_port() argument
40 if (port == FM1_DTSEC1) in fman_disable_port()
43 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
46 void fman_enable_port(enum fm_port port) in fman_enable_port() argument
50 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
53 phy_interface_t fman_port_enet_if(enum fm_port port) in fman_port_enet_if() argument
58 if (is_device_disabled(port)) in fman_port_enet_if()
61 if ((port == FM1_10GEC1) && (is_serdes_configured(XAUI_FM1))) in fman_port_enet_if()
[all …]
A Db4860.c31 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
41 void fman_enable_port(enum fm_port port) in fman_enable_port() argument
57 if (is_device_disabled(port)) in fman_port_enet_if()
61 if ((port == FM1_10GEC1 || port == FM1_10GEC2) && in fman_port_enet_if()
106 if ((port == FM1_10GEC1 || in fman_port_enet_if()
107 port == FM1_10GEC2) && in fman_port_enet_if()
111 else if ((port == FM1_DTSEC1) || in fman_port_enet_if()
112 (port == FM1_DTSEC2) || in fman_port_enet_if()
113 (port == FM1_DTSEC3) || in fman_port_enet_if()
114 (port == FM1_DTSEC4)) in fman_port_enet_if()
[all …]
A Dls1046.c36 static int is_device_disabled(enum fm_port port) in is_device_disabled() argument
41 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
44 void fman_disable_port(enum fm_port port) in fman_disable_port() argument
51 phy_interface_t fman_port_enet_if(enum fm_port port) in fman_port_enet_if() argument
56 if (is_device_disabled(port)) in fman_port_enet_if()
71 if (port == FM1_DTSEC3) in fman_port_enet_if()
76 if (port == FM1_DTSEC4) in fman_port_enet_if()
82 switch (port) { in fman_port_enet_if()
96 switch (port) { in fman_port_enet_if()
101 port - FM1_DTSEC5)) in fman_port_enet_if()
[all …]
/u-boot/arch/powerpc/include/asm/
A Dio.h53 #define inb(port) in_8((u8 *)((port)+_IO_BASE)) argument
54 #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) argument
56 #define inw(port) in_be16((u16 *)((port)+_IO_BASE)) argument
57 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) argument
58 #define inl(port) in_be32((u32 *)((port)+_IO_BASE)) argument
61 #define inw(port) in_le16((u16 *)((port)+_IO_BASE)) argument
63 #define inl(port) in_le32((u32 *)((port)+_IO_BASE)) argument
67 #define inb_p(port) in_8((u8 *)((port)+_IO_BASE)) argument
68 #define outb_p(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) argument
69 #define inw_p(port) in_le16((u16 *)((port)+_IO_BASE)) argument
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