Searched refs:prediv (Results 1 – 9 of 9) sorted by relevance
| /u-boot/arch/arm/mach-davinci/include/mach/ |
| A D | dm365_lowlevel.h | 16 int dm365_pll1_init(unsigned long pllmult, unsigned long prediv);
17 int dm365_pll2_init(unsigned long pllm, unsigned long prediv);
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| A D | pll_defs.h | 19 unsigned int prediv; /* 0x114 */ member
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| A D | hardware.h | 205 dv_reg prediv; member
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| /u-boot/drivers/video/rockchip/ |
| A D | rk_mipi.c | 202 u64 prediv = 1; in rk_mipi_phy_enable() local
275 prediv = i; in rk_mipi_phy_enable()
279 fbdiv = ddr_clk * prediv / refclk; in rk_mipi_phy_enable()
280 ddr_clk = refclk * fbdiv / prediv; in rk_mipi_phy_enable()
284 __func__, refclk, prediv, fbdiv, ddr_clk); in rk_mipi_phy_enable()
287 test_data[0] = prediv - 1; in rk_mipi_phy_enable()
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| /u-boot/drivers/clk/imx/ |
| A D | clk-composite-8m.c | 60 int *prediv, int *postdiv) in imx8m_clk_composite_compute_dividers() argument
66 *prediv = 1; in imx8m_clk_composite_compute_dividers()
74 *prediv = div1; in imx8m_clk_composite_compute_dividers()
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| /u-boot/arch/arm/mach-keystone/ |
| A D | clock.c | 282 unsigned long mult = 1, prediv = 1, output_div = 2; in pll_freq_get() local
291 prediv = (tmp & CFG_PLLCTL0_PLLD_MASK) + 1; in pll_freq_get()
300 ret = ret / prediv / output_div * mult; in pll_freq_get()
332 prediv = (tmp & CFG_PLLCTL0_PLLD_MASK) + 1; in pll_freq_get()
337 ret = ((ret / prediv) * mult) / output_div; in pll_freq_get()
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| /u-boot/drivers/clk/renesas/ |
| A D | clk-rcar-gen3.c | 166 u32 value, mult, div, prediv, postdiv; in gen3_clk_get_rate64() local
296 prediv = (value >> CPG_RPC_PREDIV_OFFSET) & in gen3_clk_get_rate64()
298 if (prediv == 2) in gen3_clk_get_rate64()
300 else if (prediv == 3) in gen3_clk_get_rate64()
311 core->parent, prediv, postdiv, rate); in gen3_clk_get_rate64()
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| /u-boot/arch/arm/mach-keystone/include/mach/ |
| A D | clock_defs.h | 23 u32 prediv; /* 14 */ member
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| /u-boot/arch/arm/mach-davinci/ |
| A D | da850_lowlevel.c | 86 ®->prediv); in da850_pll_init()
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