| /u-boot/arch/riscv/include/asm/ |
| A D | io.h | 255 *ptr2 = *ptr; in readsb()
256 ptr2++; in readsb()
270 *ptr2 = *ptr; in readsw()
271 ptr2++; in readsw()
285 *ptr2 = *ptr; in readsl()
286 ptr2++; in readsl()
300 *ptr = *ptr2; in writesb()
301 ptr2++; in writesb()
315 *ptr = *ptr2; in writesw()
316 ptr2++; in writesw()
[all …]
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| /u-boot/arch/nds32/include/asm/ |
| A D | io.h | 264 *ptr2 = *ptr; in readsb()
265 ptr2++; in readsb()
275 *ptr2 = *ptr; in readsw()
276 ptr2++; in readsw()
286 *ptr2 = *ptr; in readsl()
287 ptr2++; in readsl()
296 *ptr = *ptr2; in writesb()
297 ptr2++; in writesb()
306 *ptr = *ptr2; in writesw()
307 ptr2++; in writesw()
[all …]
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| /u-boot/arch/arm/mach-sunxi/ |
| A D | dram_sun50i_h616.c | 387 u32 val1, val2, *ptr1, *ptr2; in mctl_phy_read_training() local
411 ptr2 = (u32*)(SUNXI_DRAM_PHY0_BASE + 0x850); in mctl_phy_read_training()
414 val2 = readl(&ptr2[i]); in mctl_phy_read_training()
422 val2 = readl(&ptr2[i]); in mctl_phy_read_training()
432 val2 = readl(&ptr2[i]); in mctl_phy_read_training()
441 val2 = readl(&ptr2[i]); in mctl_phy_read_training()
476 u32 val1, val2, *ptr1, *ptr2; in mctl_phy_write_training() local
504 val2 = readl(&ptr2[i]); in mctl_phy_write_training()
512 val2 = readl(&ptr2[i]); in mctl_phy_write_training()
522 val2 = readl(&ptr2[i]); in mctl_phy_write_training()
[all …]
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| A D | dram_sun8i_a23.c | 132 writel((dram_para.tpr0 & 0x000fffff), &mctl_phy->ptr2); in mctl_init()
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| A D | dram_sun6i.c | 133 writel((MCTL_TDINIT3 << 17) | MCTL_TDINIT2, &mctl_phy->ptr2); in mctl_channel_init()
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| /u-boot/board/ti/ks2_evm/ |
| A D | ddr3_k2g.c | 22 .ptr2 = 0,
62 .ptr2 = 0,
123 .ptr2 = 0,
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| A D | ddr3_cfg.c | 20 .ptr2 = 0, /* not set in gel */
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| /u-boot/lib/ |
| A D | hexdump.c | 104 const u16 *ptr2 = buf; in hex_dump_to_buffer() local
109 get_unaligned(ptr2 + j)); in hex_dump_to_buffer()
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| /u-boot/arch/arm/mach-keystone/include/mach/ |
| A D | ddr3.h | 20 unsigned int ptr2; member
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| /u-boot/board/imgtec/ci20/ |
| A D | ci20.c | 299 .ptr2 = 0x04013880,
343 .ptr2 = 0x04013880,
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| /u-boot/lib/efi/ |
| A D | efi_stub.c | 252 void *ptr1, int size1, void *ptr2, int size2) in add_entry_addr() argument
262 memcpy((void *)(hdr + 1) + size1, ptr2, size2); in add_entry_addr()
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| /u-boot/arch/arm/include/asm/arch-sunxi/ |
| A D | dram_sun8i_a33.h | 85 u32 ptr2; /* 0x4c */ member
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| A D | dram_sun8i_a83t.h | 85 u32 ptr2; /* 0x4c */ member
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| A D | dram_sun8i_a23.h | 172 u32 ptr2; /* 0x24 */ member
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| A D | dram_sun6i.h | 169 u32 ptr2; /* 0x20 */ member
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| /u-boot/drivers/ram/stm32mp1/ |
| A D | stm32mp1_ddr.h | 133 u32 ptr2; member
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| A D | stm32mp1_ddr_regs.h | 150 u32 ptr2; /* 0x20 R/W PHY Timing 2*/ member
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| A D | stm32mp1_ddr.c | 171 DDRPHY_REG_TIMING(ptr2),
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| /u-boot/arch/arm/mach-keystone/ |
| A D | ddr3_spd.c | 27 debug_ddr_cfg("ptr2 0x%08X\n", ptr->ptr2); in dump_phy_config()
312 spd_cb->phy_cfg.ptr2 = 0; in init_ddr3param()
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| /u-boot/arch/mips/mach-jz47xx/jz4780/ |
| A D | sdram.c | 85 writel(ddr_config->ptr2, ddr_phy_regs + DDRP_PTR2); in ddr_phy_init()
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| /u-boot/arch/mips/mach-jz47xx/include/mach/ |
| A D | jz4780_dram.h | 443 u32 ptr2; /* PHY Timing Register 1 */ member
|