Searched refs:puen (Results 1 – 9 of 9) sorted by relevance
/u-boot/arch/arm/cpu/arm926ejs/mx27/ |
A D | generic.c | 219 writel(readl(®s->port[port].puen) | (1 << pin), in imx_gpio_mode() 220 ®s->port[port].puen); in imx_gpio_mode() 222 writel(readl(®s->port[port].puen) & ~(1 << pin), in imx_gpio_mode() 223 ®s->port[port].puen); in imx_gpio_mode()
|
/u-boot/arch/arm/include/asm/arch-mx27/ |
A D | gpio.h | 29 u32 puen; member
|
/u-boot/board/armadeus/apf27/ |
A D | apf27.c | 65 u32 puen, u32 gius) in apf27_port_init() argument 81 writel(puen, ®s->port[port].puen); in apf27_port_init()
|
/u-boot/drivers/pinctrl/renesas/ |
A D | sh_pfc.h | 179 u32 puen; /* Pull-enable or pull-up control register */ member 185 .puen = r1, \
|
A D | pfc.c | 349 for (i = 0; pfc->info->bias_regs[i].puen; i++) { in sh_pfc_pin_to_bias_reg()
|
A D | pfc-r8a77990.c | 5248 if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit))) in r8a77990_pinmux_get_bias() 5267 enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit); in r8a77990_pinmux_set_bias() 5276 sh_pfc_write(pfc, reg->puen, enable); in r8a77990_pinmux_set_bias()
|
A D | pfc-r8a7795.c | 6220 if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit))) in r8a7795_pinmux_get_bias() 6239 enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit); in r8a7795_pinmux_set_bias() 6248 sh_pfc_write(pfc, reg->puen, enable); in r8a7795_pinmux_set_bias()
|
A D | pfc-r8a7796.c | 6131 if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit))) in r8a7796_pinmux_get_bias() 6150 enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit); in r8a7796_pinmux_set_bias() 6159 sh_pfc_write(pfc, reg->puen, enable); in r8a7796_pinmux_set_bias()
|
A D | pfc-r8a77965.c | 6427 if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit))) in r8a77965_pinmux_get_bias() 6446 enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit); in r8a77965_pinmux_set_bias() 6455 sh_pfc_write(pfc, reg->puen, enable); in r8a77965_pinmux_set_bias()
|
Completed in 73 milliseconds