/u-boot/drivers/video/exynos/ |
A D | exynos_pwm_bl.c | 19 static struct pwm_backlight_data *pwm; variable 23 int brightness = pwm->brightness; in exynos_pwm_backlight_update_status() 24 int max = pwm->max_brightness; in exynos_pwm_backlight_update_status() 27 pwm_config(pwm->pwm_id, 0, pwm->period); in exynos_pwm_backlight_update_status() 28 pwm_disable(pwm->pwm_id); in exynos_pwm_backlight_update_status() 30 pwm_config(pwm->pwm_id, in exynos_pwm_backlight_update_status() 31 brightness * pwm->period / max, pwm->period); in exynos_pwm_backlight_update_status() 32 pwm_enable(pwm->pwm_id); in exynos_pwm_backlight_update_status() 39 pwm = pd; in exynos_pwm_backlight_init()
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/u-boot/doc/device-tree-bindings/pwm/ |
A D | pwm.txt | 10 pwm-list ::= <single-pwm> [pwm-list] 11 single-pwm ::= <pwm-phandle> <pwm-specifier> 13 pwm-specifier : array of #pwm-cells specifying the given PWM 29 pwm: pwm { 30 #pwm-cells = <2>; 36 pwms = <&pwm 0 5000000>; 37 pwm-names = "backlight"; 47 <dt-bindings/pwm/pwm.h>) in a third cell: 54 pwm-names = "backlight"; 65 pwm: pwm@7000a000 { [all …]
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A D | tegra20-pwm.txt | 5 - "nvidia,tegra20-pwm" 6 - "nvidia,tegra30-pwm" 8 - #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The 14 pwm: pwm@7000a000 { 15 compatible = "nvidia,tegra20-pwm"; 17 #pwm-cells = <2>;
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A D | pwm-sifive.txt | 10 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm 13 - compatible: Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". 14 Supported compatible strings are: "sifive,fu540-c000-pwm" for the SiFive 19 - #pwm-cells: Should be 3. 24 pwm: pwm@10020000 { 25 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0"; 30 #pwm-cells = <3>;
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/u-boot/arch/arm/cpu/armv7/s5p-common/ |
A D | pwm.c | 17 const struct s5p_timer *pwm = in pwm_enable() local 25 tcon = readl(&pwm->tcon); in pwm_enable() 28 writel(tcon, &pwm->tcon); in pwm_enable() 43 tcon = readl(&pwm->tcon); in pwm_disable() 46 writel(tcon, &pwm->tcon); in pwm_disable() 67 writel(0, &pwm->tcfg0); in pwm_calc_tin() 68 val = readl(&pwm->tcfg0); in pwm_calc_tin() 75 writel(0, &pwm->tcfg1); in pwm_calc_tin() 76 val = readl(&pwm->tcfg1); in pwm_calc_tin() 146 tcon = readl(&pwm->tcon); in pwm_config() [all …]
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A D | Makefile | 7 obj-$(CONFIG_PWM_NX) += pwm.o 8 obj-$(CONFIG_S5P4418_ONEWIRE) += pwm.o 14 obj-$(CONFIG_PWM) += pwm.o
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/u-boot/drivers/pwm/ |
A D | pwm-imx.c | 22 if (!pwm) in pwm_init() 25 writel(0, &pwm->ir); in pwm_init() 34 writel(0, &pwm->ir); in pwm_config_internal() 39 writel(cr, &pwm->cr); in pwm_config_internal() 41 writel(duty_cycles, &pwm->sar); in pwm_config_internal() 43 writel(period_cycles, &pwm->pr); in pwm_config_internal() 52 if (!pwm) in pwm_config() 65 if (!pwm) in pwm_enable() 68 setbits_le32(&pwm->cr, PWMCR_EN); in pwm_enable() 76 if (!pwm) in pwm_disable() [all …]
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A D | Makefile | 11 obj-$(CONFIG_DM_PWM) += pwm-uclass.o 14 obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o 15 obj-$(CONFIG_PWM_MESON) += pwm-meson.o 16 obj-$(CONFIG_PWM_MTK) += pwm-mtk.o 19 obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o 22 obj-$(CONFIG_PWM_TI_EHRPWM) += pwm-ti-ehrpwm.o
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/u-boot/test/dm/ |
A D | panel.c | 24 struct udevice *dev, *pwm, *gpio, *reg; in dm_test_panel() local 31 ut_assertok(uclass_first_device_err(UCLASS_PWM, &pwm)); in dm_test_panel() 34 ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, in dm_test_panel() 40 ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, in dm_test_panel() 50 ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, in dm_test_panel() 55 ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, in dm_test_panel() 60 ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, in dm_test_panel() 66 ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, in dm_test_panel() 72 ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, in dm_test_panel()
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/u-boot/arch/arm/dts/ |
A D | stm32f746.dtsi | 59 pwm { 89 pwm { 119 pwm { 148 pwm { 218 pwm { 240 pwm { 256 pwm { 389 pwm { 411 pwm { 484 pwm { [all …]
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A D | stm32f429.dtsi | 72 pwm { 102 pwm { 132 pwm { 161 pwm { 231 pwm { 253 pwm { 269 pwm { 425 pwm { 447 pwm { 581 pwm { [all …]
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A D | tegra20-medcom-wide.dts | 43 pwm: pwm@7000a000 { label 59 nvidia,pwm = <&pwm 0 500000>;
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A D | tegra20-tec.dts | 55 pwm: pwm@7000a000 { label 71 nvidia,pwm = <&pwm 0 500000>;
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A D | am335x-brppt1-mmc.dts | 53 bkl-pwm = <&pwmbacklight>; 95 pwm0: omap-pwm@timer5 { 96 compatible = "ti,omap-dmtimer-pwm"; 98 #pwm-cells = <3>; 101 pwm1: omap-pwm@timer6 { 102 compatible = "ti,omap-dmtimer-pwm"; 104 #pwm-cells = <3>; 107 beeper: pwm-beep { 108 compatible = "pwm-beeper"; 112 pwmbacklight: pwm-bkl { [all …]
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A D | rk3308.dtsi | 363 compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; 374 compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; 385 compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; 396 compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; 407 compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; 418 compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; 429 compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; 440 compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; 451 compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; 462 compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; [all …]
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A D | am335x-brppt1-spi.dts | 54 bkl-pwm = <&pwmbacklight>; 96 pwm0: omap-pwm@timer5 { 97 compatible = "ti,omap-dmtimer-pwm"; 99 #pwm-cells = <3>; 102 pwm1: omap-pwm@timer6 { 103 compatible = "ti,omap-dmtimer-pwm"; 105 #pwm-cells = <3>; 108 beeper: pwm-beep { 109 compatible = "pwm-beeper"; 113 pwmbacklight: pwm-bkl { [all …]
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A D | rk3036.dtsi | 149 pwm0: pwm@20050000 { 152 #pwm-cells = <3>; 156 clock-names = "pwm"; 160 pwm1: pwm@20050010 { 163 #pwm-cells = <3>; 167 clock-names = "pwm"; 171 pwm2: pwm@20050020 { 174 #pwm-cells = <3>; 178 clock-names = "pwm"; 182 pwm3: pwm@20050030 { [all …]
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A D | am335x-brppt1-nand.dts | 53 bkl-pwm = <&pwmbacklight>; 95 pwm0: omap-pwm@timer5 { 96 compatible = "ti,omap-dmtimer-pwm"; 98 #pwm-cells = <3>; 101 pwm1: omap-pwm@timer6 { 102 compatible = "ti,omap-dmtimer-pwm"; 104 #pwm-cells = <3>; 107 beeper: pwm-beep { 108 compatible = "pwm-beeper"; 112 pwmbacklight: pwm-bkl { [all …]
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A D | meson-g12b-khadas-vim3.dtsi | 15 compatible = "pwm-regulator"; 24 pwm-dutycycle-range = <100 0>; 34 compatible = "pwm-regulator"; 43 pwm-dutycycle-range = <100 0>;
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A D | exynos5250.dtsi | 123 pwm: pwm@12dd0000 { label 124 compatible = "samsung,exynos4210-pwm"; 126 samsung,pwm-outputs = <0>, <1>, <2>, <3>; 127 #pwm-cells = <3>;
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A D | stm32h743.dtsi | 53 pwm { 54 compatible = "st,stm32-pwm-lp"; 55 #pwm-cells = <3>; 380 pwm { 382 #pwm-cells = <3>; 407 pwm { 409 #pwm-cells = <3>; 429 pwm { 431 #pwm-cells = <3>; 445 pwm { [all …]
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A D | stm32mp151.dtsi | 158 pwm { 192 pwm { 224 pwm { 258 pwm { 321 pwm { 343 pwm { 365 pwm { 389 pwm { 629 pwm { 665 pwm { [all …]
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A D | twl6030.dtsi | 88 twl_pwm: pwm { 90 compatible = "ti,twl6030-pwm"; 91 #pwm-cells = <2>; 97 #pwm-cells = <2>;
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/u-boot/doc/device-tree-bindings/video/ |
A D | tegra20-dc.txt | 25 - nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt) 30 * delay between backlight_vdd and pwm-rise 31 * delay between pwm-rise and backlight_en-rise 79 nvidia,pwm = <&pwm 2 0>;
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/u-boot/drivers/power/regulator/ |
A D | pwm_regulator.c | 32 struct udevice *pwm; member 47 return pwm_set_enable(priv->pwm, priv->pwm_id, enable); in pwm_regulator_enable() 75 ret = pwm_set_invert(priv->pwm, priv->pwm_id, priv->polarity); in pwm_regulator_set_voltage() 81 ret = pwm_set_config(priv->pwm, priv->pwm_id, in pwm_regulator_set_voltage() 114 ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm); in pwm_regulator_of_to_plat()
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