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Searched refs:pwr_base (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/clk/
A Dclk_stm32h7.c354 uint8_t *pwr_base = (uint8_t *)regmap_get_range(priv->pwr_regmap, 0); in configure_clocks() local
373 clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK, in configure_clocks()
376 clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN); in configure_clocks()
377 while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY)) in configure_clocks()

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