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Searched refs:pwr_reg (Results 1 – 11 of 11) sorted by relevance

/u-boot/drivers/clk/mediatek/
A Dclk-mtk.c230 r = readl(priv->base + pll->pwr_reg) | CON0_PWR_ON; in mtk_apmixedsys_enable()
231 writel(r, priv->base + pll->pwr_reg); in mtk_apmixedsys_enable()
234 r = readl(priv->base + pll->pwr_reg) & ~CON0_ISO_EN; in mtk_apmixedsys_enable()
235 writel(r, priv->base + pll->pwr_reg); in mtk_apmixedsys_enable()
269 r = readl(priv->base + pll->pwr_reg) | CON0_ISO_EN; in mtk_apmixedsys_disable()
270 writel(r, priv->base + pll->pwr_reg); in mtk_apmixedsys_disable()
272 r = readl(priv->base + pll->pwr_reg) & ~CON0_PWR_ON; in mtk_apmixedsys_disable()
273 writel(r, priv->base + pll->pwr_reg); in mtk_apmixedsys_disable()
A Dclk-mtk.h34 u32 pwr_reg; member
A Dclk-mt8512.c26 .pwr_reg = _pwr_reg, \
A Dclk-mt8516.c25 .pwr_reg = _pwr_reg, \
A Dclk-mt7622.c37 .pwr_reg = _pwr_reg, \
A Dclk-mt7629.c37 .pwr_reg = _pwr_reg, \
A Dclk-mt8183.c26 .pwr_reg = _pwr_reg, \
A Dclk-mt7623.c33 .pwr_reg = _pwr_reg, \
A Dclk-mt8518.c25 .pwr_reg = _pwr_reg, \
/u-boot/board/dhelectronics/dh_stm32mp1/
A Dboard.c443 struct udevice *pwr_reg; in sysconf_init() local
496 &pwr_reg); in sysconf_init()
500 if (regulator_get_value(pwr_reg) < 2700000) { in sysconf_init()
/u-boot/board/st/stm32mp1/
A Dstm32mp1.c452 struct udevice *pwr_reg; in sysconf_init() local
503 &pwr_reg); in sysconf_init()
507 if (regulator_get_value(pwr_reg) < 2700000) { in sysconf_init()

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