Home
last modified time | relevance | path

Searched refs:r10 (Results 1 – 23 of 23) sorted by relevance

/u-boot/arch/arm/cpu/armv7/
A Dcache_v7_asm.S32 mov r10, #0 @ start clean at cache level 0
34 add r2, r10, r10, lsr #1 @ work out 3x current cache level
39 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
64 add r10, r10, #2 @ increment cache number
65 cmp r3, r10
68 mov r10, #0 @ swith back to cache level 0
102 mov r10, #0 @ start clean at cache level 0
104 add r2, r10, r10, lsr #1 @ work out 3x current cache level
134 add r10, r10, #2 @ increment cache number
135 cmp r3, r10
[all …]
A Dpsci.S197 mov r10, #0 @ start clean at cache level 0
199 add r2, r10, r10, lsr #1 @ work out 3x current cache level
205 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
219 orr r11, r10, r4, lsl r5 @ factor way and cache number into r11
227 add r10, r10, #2 @ increment cache number
228 cmp r3, r10
231 mov r10, #0 @ swith back to cache level 0
232 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
/u-boot/arch/powerpc/cpu/mpc85xx/
A Drelease.S189 add r10,r3,r8
389 stw r3,ENTRY_R3_UPPER(r10)
391 stw r3,ENTRY_RESV(r10)
392 stw r4,ENTRY_PIR(r10)
410 dcbf 0, r10
439 ld r3,ENTRY_R3_UPPER(r10)
451 lwz r0,ENTRY_PIR(r10)
454 stw r0,ENTRY_PIR(r10)
464 mtspr SPRN_MAS0,r10
466 ori r10,r10,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l
[all …]
A Dstart.S1533 mr r10,r5 /* Save copy of Destination Address */
1551 sub r15,r10,r4
1612 addi r0,r10,in_ram - _start
1623 mtspr IVPR,r10
1688 mr r4,r10 /* Destination Address */
/u-boot/arch/arm/lib/
A Drelocate.S58 ldmia r0!, {r2-r8,r10}
59 stmia r1!, {r2-r8,r10}
60 ldmia r0!, {r2-r8,r10}
61 stmia r1!, {r2-r8,r10}
87 ldmia r1!, {r10-r11} /* copy from source address [r1] */
88 stmia r0!, {r10-r11} /* copy to target address [r0] */
/u-boot/arch/microblaze/cpu/
A Dstart.S116 swi r10, r1, 24
144 lhu r7, r1, r10
145 rsubi r8, r10, 0x2
147 rsubi r8, r10, 0x6
178 lhu r7, r1, r10
179 rsubi r8, r10, 0xa
181 rsubi r8, r10, 0xe
191 lhu r7, r1, r10
192 rsubi r8, r10, 0x12
203 lhu r7, r1, r10
[all …]
A Dirq.S22 swi r10, r1, 36
67 lwi r10, r1, 36
/u-boot/board/nokia/rx51/
A Dlowlevel_init.S81 ldmdb r1!, {r3 - r10}
82 stmdb r2!, {r3 - r10}
149 ldmdb r3!, {r7 - r10}
150 stmdb r4!, {r7 - r10}
181 ldmia r0!, {r3 - r10}
182 stmia r1!, {r3 - r10}
188 ldmdb r1!, {r3 - r10}
189 stmdb r2!, {r3 - r10}
/u-boot/arch/arm/mach-exynos/
A Dsec_boot.S102 ldr r10, [r0, r7, lsl #2]
104 tst r10, #(1 << 4)
116 tst r10, #(1 << 0)
/u-boot/board/armltd/integrator/
A Dlowlevel_init.S175 stmfd r13!,{r4-r10,lr}
188 ldmia r0!, {r3-r10} /* copy from source address [r0] */
189 stmia r1!, {r3-r10} /* copy to target address [r1] */
193 ldmfd r13!,{r4-r10,pc} /* back to caller */
/u-boot/arch/nds32/cpu/n1213/ag101/
A Dlowlevel_init.S171 move $r10, $lp
179 ret $r10
259 add $r10, $r10, $r5
/u-boot/arch/arc/include/asm/
A Dptrace.h34 long r10; member
/u-boot/arch/nds32/cpu/n1213/ae3xx/
A Dlowlevel_init.S100 move $r10, $lp
106 ret $r10
/u-boot/arch/nios2/cpu/
A Dexceptions.S34 stw r10, 40(sp)
114 ldw r10, 40(sp)
/u-boot/arch/powerpc/cpu/mpc8xx/
A Dstart.S339 mr r10, r5 /* Save copy of Destination Address */
356 sub r15, r10, r4
417 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
480 mr r4, r10 /* Destination Address */
/u-boot/doc/develop/
A Dglobal_data.rst26 | NDS32 | r10 |
/u-boot/arch/arm/cpu/arm920t/ep93xx/
A Dlowlevel_init.S416 mov r10, r2
419 mul r1, r8, r10
/u-boot/arch/arc/lib/
A Dints_low.S39 PUSH %r10
/u-boot/arch/arm/mach-imx/mx5/
A Dlowlevel_init.S378 mov r10, lr
401 mov pc, r10
/u-boot/arch/arm/mach-omap2/omap3/
A Dlowlevel_init.S50 ldmia r0!, {r3 - r10} /* copy from source address [r0] */
51 stmia r1!, {r3 - r10} /* copy to target address [r1] */
/u-boot/arch/powerpc/cpu/mpc86xx/
A Dstart.S654 mr r10, r5 /* Save copy of Destination Address */
671 sub r15, r10, r4
729 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
790 mr r4, r10 /* Destination Address */
/u-boot/arch/powerpc/cpu/mpc83xx/
A Dstart.S821 mr r10, r5 /* Save copy of Destination Address */
839 sub r15, r10, r4
917 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
983 mr r4, r10 /* Destination Address */
/u-boot/include/
A Dppc_asm.tmpl60 #define r10 10

Completed in 20 milliseconds