Home
last modified time | relevance | path

Searched refs:ram (Results 1 – 25 of 108) sorted by relevance

12345

/u-boot/test/lib/
A Dlmb.c319 ASSERT_LMB(&lmb, ram, ram_size, 1, ram + ram_size - in test_noreserved()
323 ASSERT_LMB(&lmb, ram, ram_size, 2, ram + ram_size - in test_noreserved()
495 a = lmb_alloc_addr(&lmb, ram, alloc_addr_a - ram); in test_alloc_addr()
497 ASSERT_LMB(&lmb, ram, ram_size, 3, ram, 0x8010000, in test_alloc_addr()
502 ASSERT_LMB(&lmb, ram, ram_size, 2, ram, 0x10010000, in test_alloc_addr()
507 ASSERT_LMB(&lmb, ram, ram_size, 1, ram, 0x18010000, in test_alloc_addr()
512 ASSERT_LMB(&lmb, ram, ram_size, 1, ram, ram_size, in test_alloc_addr()
518 ASSERT_LMB(&lmb, ram, ram_size, 1, ram, ram_size, in test_alloc_addr()
528 ASSERT_LMB(&lmb, ram, ram_size, 2, ram, 0x18010000, in test_alloc_addr()
532 ASSERT_LMB(&lmb, ram, ram_size, 1, ram, 0x18010000, in test_alloc_addr()
[all …]
/u-boot/arch/x86/cpu/qemu/
A Ddram.c16 u32 ram; in qemu_get_low_memory_size() local
19 ram = ((u32)inb(CMOS_DATA_PORT)) << 14; in qemu_get_low_memory_size()
21 ram |= ((u32)inb(CMOS_DATA_PORT)) << 6; in qemu_get_low_memory_size()
22 ram += 16 * 1024; in qemu_get_low_memory_size()
24 return ram * 1024; in qemu_get_low_memory_size()
29 u64 ram; in qemu_get_high_memory_size() local
32 ram = ((u64)inb(CMOS_DATA_PORT)) << 22; in qemu_get_high_memory_size()
34 ram |= ((u64)inb(CMOS_DATA_PORT)) << 14; in qemu_get_high_memory_size()
36 ram |= ((u64)inb(CMOS_DATA_PORT)) << 6; in qemu_get_high_memory_size()
38 return ram * 1024; in qemu_get_high_memory_size()
/u-boot/arch/mips/mach-octeon/
A Ddram.c20 struct ram_info ram; in dram_init() local
30 ret = ram_get_info(dev, &ram); in dram_init()
36 gd->ram_size = ram.size; in dram_init()
38 (unsigned long)ram.base, (unsigned long)ram.size); in dram_init()
54 struct ram_info ram; in board_add_ram_info() local
64 ret = ram_get_info(dev, &ram); in board_add_ram_info()
71 print_size(ram.size, " total)"); in board_add_ram_info()
/u-boot/arch/mips/mach-bmips/
A Ddram.c18 struct ram_info ram; in dram_init() local
28 err = ram_get_info(dev, &ram); in dram_init()
34 debug("SDRAM base=%zx, size=%x\n", ram.base, ram.size); in dram_init()
36 gd->ram_size = ram.size; in dram_init()
/u-boot/arch/arm/mach-stm32mp/
A Ddram_init.c21 struct ram_info ram; in dram_init() local
30 ret = ram_get_info(dev, &ram); in dram_init()
35 log_debug("RAM init base=%lx, size=%x\n", ram.base, ram.size); in dram_init()
37 gd->ram_size = ram.size; in dram_init()
/u-boot/arch/sh/cpu/
A Du-boot.lds21 ram : ORIGIN = CONFIG_SYS_SDRAM_BASE, LENGTH = CONFIG_SYS_SDRAM_SIZE
47 } >ram =0xFF
53 } >ram
62 } >ram
70 } >ram
75 } >ram
87 } >ram
/u-boot/drivers/dfu/
A Ddfu_ram.c25 if (offset > dfu->data.ram.size) { in dfu_transfer_medium_ram()
31 memcpy(map_sysmem(dfu->data.ram.start + offset, 0), buf, *len); in dfu_transfer_medium_ram()
33 memcpy(buf, map_sysmem(dfu->data.ram.start + offset, 0), *len); in dfu_transfer_medium_ram()
46 *size = dfu->data.ram.size; in dfu_get_medium_size_ram()
77 dfu->data.ram.start = simple_strtoul(argv[1], NULL, 16); in dfu_fill_entity_ram()
78 dfu->data.ram.size = simple_strtoul(argv[2], NULL, 16); in dfu_fill_entity_ram()
/u-boot/test/py/tests/
A Dtest_tpm2.py141 ram = u_boot_utils.find_ram_base(u_boot_console)
163 ram = u_boot_utils.find_ram_base(u_boot_console)
171 read_cap = u_boot_console.run_command('tpm2 get_capability 0x6 0x20f 0x%x 3' % ram)
186 ram = u_boot_utils.find_ram_base(u_boot_console)
188 read_pcr = u_boot_console.run_command('tpm2 pcr_read 0 0x%x' % ram)
213 ram = u_boot_utils.find_ram_base(u_boot_console)
215 u_boot_console.run_command('tpm2 pcr_extend 0 0x%x' % ram)
219 read_pcr = u_boot_console.run_command('tpm2 pcr_read 0 0x%x' % ram)
/u-boot/arch/arm/mach-aspeed/ast2500/
A Dboard_common.c42 struct ram_info ram; in dram_init() local
51 ret = ram_get_info(dev, &ram); in dram_init()
57 gd->ram_size = ram.size; in dram_init()
/u-boot/arch/arm/mach-mediatek/mt7629/
A Dinit.c101 struct ram_info ram; in dram_init() local
109 ret = ram_get_info(dev, &ram); in dram_init()
113 debug("RAM init base=%lx, size=%x\n", ram.base, ram.size); in dram_init()
115 gd->ram_size = ram.size; in dram_init()
/u-boot/arch/arm/mach-aspeed/ast2600/
A Dboard_common.c34 struct ram_info ram; in dram_init() local
42 ret = ram_get_info(dev, &ram); in dram_init()
48 gd->ram_size = ram.size; in dram_init()
/u-boot/drivers/ram/rockchip/
A DKconfig6 This enables support for ram drivers Rockchip SoCs.
15 bool "Rockchip ram drivers debugging"
19 This enables debugging ram driver API's for the platforms
22 This is an option for developers to understand the ram drivers
/u-boot/board/keymile/scripts/
A DREADME8 run ramfs : setup environment to configure for rootfs in ram
25 This file defines variables for working with rootfs inside the ram for powerpc
31 ram.
/u-boot/arch/arm/mach-rockchip/
A Dsdram.c187 struct ram_info ram; in dram_init() local
196 ret = ram_get_info(dev, &ram); in dram_init()
201 gd->ram_size = ram.size; in dram_init()
203 (unsigned long)ram.base, (unsigned long)ram.size); in dram_init()
/u-boot/board/CZ.NIC/turris_mox/
A Dmox_sp.c112 int mbox_sp_get_board_info(u64 *sn, u8 *mac1, u8 *mac2, int *bv, int *ram) in mbox_sp_get_board_info() argument
130 if (ram) in mbox_sp_get_board_info()
131 *ram = out[3]; in mbox_sp_get_board_info()
A Dmox_sp.h13 int *ram);
/u-boot/arch/x86/cpu/tangier/
A Dsdram.c175 phys_size_t ram = 0; in sfi_get_ram_size() local
186 ram += mentry->pages << 12; in sfi_get_ram_size()
189 debug("sfi: RAM size %llu\n", ram); in sfi_get_ram_size()
190 return ram; in sfi_get_ram_size()
/u-boot/drivers/ram/
A DKconfig76 source "drivers/ram/aspeed/Kconfig"
77 source "drivers/ram/rockchip/Kconfig"
78 source "drivers/ram/sifive/Kconfig"
79 source "drivers/ram/stm32mp1/Kconfig"
80 source "drivers/ram/octeon/Kconfig"
A Dram-uclass.c24 UCLASS_DRIVER(ram) = {
A DMakefile6 obj-$(CONFIG_RAM) += ram-uclass.o
/u-boot/drivers/pci/
A Dpci_rom.c241 struct pci_rom_header *rom = NULL, *ram = NULL; in dm_pci_run_vga_bios() local
260 ret = pci_rom_load(rom, &ram, &alloced); in dm_pci_run_vga_bios()
307 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, in dm_pci_run_vga_bios()
316 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode, in dm_pci_run_vga_bios()
325 free(ram); in dm_pci_run_vga_bios()
/u-boot/arch/arm/dts/
A Dam3517.dtsi38 ti,davinci-ctrl-ram-offset = <0x20000>;
39 ti,davinci-ctrl-ram-size = <0x2000>;
87 reg-names = "hecc", "hecc-ram", "mbx";
/u-boot/board/st/common/
A DKconfig68 …default "uImage ram 0xc2000000 0x2000000;devicetree.dtb ram 0xc4000000 0x100000;uramdisk.image.gz
71 This defines the partitions of ram used to build dfu dynamically.
/u-boot/board/intel/edison/
A Dedison-environment.txt3 dfu_alt_info_ram=kernel ram ${loadaddr} 0x800000
5 dfu_alt_info_reset=reset ram 0x0 0x0
26 do_dnx=setenv dfu_alt_info ${dfu_alt_info_ram};dfu 0 ram 0 ram;run bootcmd
/u-boot/drivers/ram/sifive/
A DKconfig6 This enables support for ram drivers of SiFive SoCs.

Completed in 26 milliseconds

12345