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Searched refs:rcwsr (Results 1 – 25 of 64) sorted by relevance

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/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dfsl_lsch3_serdes.c96 cfg = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]); in serdes_get_first_lane()
103 cfg = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS2_REGSR - 1]); in serdes_get_first_lane()
110 cfg = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS3_REGSR - 1]); in serdes_get_first_lane()
134 void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask, in serdes_init() argument
146 cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask; in serdes_init()
401 u32 cfg_rcwsrds1 = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]); in setup_serdes_volt()
405 u32 cfg_rcwsrds2 = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS2_REGSR - 1]); in setup_serdes_volt()
410 u32 cfg_rcwsrds3 = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS3_REGSR - 1]); in setup_serdes_volt()
608 int serdes_set_env(int sd, int rcwsr, int sd_prctl_mask, int sd_prctl_shift) in serdes_set_env() argument
615 cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask; in serdes_set_env()
A Dfsl_lsch3_speed.c94 sys_info->freq_systembus *= (gur_in32(&gur->rcwsr[0]) >> in get_sys_info()
97 sys_info->freq_ddrbus *= (gur_in32(&gur->rcwsr[0]) >> in get_sys_info()
102 sys_info->freq_ddrbus2 *= (gur_in32(&gur->rcwsr[0]) >> in get_sys_info()
140 rcw_tmp = in_le32(&gur->rcwsr[5]); in get_sys_info()
A Dfsl_lsch2_speed.c71 sys_info->freq_systembus *= (gur_in32(&gur->rcwsr[0]) >> in get_sys_info()
78 sys_info->freq_ddrbus *= (gur_in32(&gur->rcwsr[0]) >> in get_sys_info()
104 rcw_tmp = in_be32(&gur->rcwsr[7]); in get_sys_info()
133 rcw_tmp = in_be32(&gur->rcwsr[15]); in get_sys_info()
A Dfsl_lsch2_serdes.c44 u32 cfg = gur_in32(&gur->rcwsr[4]); in serdes_get_first_lane()
80 u32 cfg = gur_in32(&gur->rcwsr[4]) & in get_serdes_protocol()
113 cfg = gur_in32(&gur->rcwsr[4]) & sd_prctl_mask; in serdes_init()
150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt()
151 u32 cfg_rcw5 = gur_in32(&gur->rcwsr[5]); in setup_serdes_volt()
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dfsl_corenet_serdes.c131 return !(in_be32(&gur->rcwsr[word]) & (0x80000000 >> bit)); in serdes_lane_enabled()
139 if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN)) in is_serdes_configured()
175 if (unlikely((in_be32(&gur->rcwsr[5]) & 0x2000) == 0)) in serdes_get_first_lane()
178 prtcl = (in_be32(&gur->rcwsr[4]) & FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; in serdes_get_first_lane()
257 if (unlikely((in_be32(&gur->rcwsr[5]) & 0x2000) == 0)) in serdes_reset_rx()
261 prtcl = (in_be32(&gur->rcwsr[4]) & FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; in serdes_reset_rx()
301 rcw5 = in_be32(gur->rcwsr + 5); in enable_bank()
388 srds_ratio_b2 = (in_be32(&gur->rcwsr[4]) >> 13) & 7; in p4080_erratum_serdes8()
527 if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN)) in fsl_serdes_init()
531 cfg = (in_be32(&gur->rcwsr[4]) & FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; in fsl_serdes_init()
[all …]
A Dspeed.c96 ddr_refclk_sel = (in_be32(&gur->rcwsr[5]) >> in get_sys_info()
113 sys_info->freq_systembus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; in get_sys_info()
114 mem_pll_rat = (in_be32(&gur->rcwsr[0]) >> in get_sys_info()
119 mem_pll_rat = (in_be32(&gur->rcwsr[0]) >> in get_sys_info()
215 rcw_tmp = in_be32(&gur->rcwsr[15]) - 4; in get_sys_info()
217 rcw_tmp = in_be32(&gur->rcwsr[7]); in get_sys_info()
268 rcw_tmp1 = in_be32(&gur->rcwsr[7]); /* Reading RCW bits: 224-255*/ in get_sys_info()
269 rcw_tmp2 = in_be32(&gur->rcwsr[15]); /* Reading RCW bits: 480-511*/ in get_sys_info()
417 rcw_tmp = in_be32(&gur->rcwsr[15]); in get_sys_info()
476 rcw_tmp = in_be32(&gur->rcwsr[7]); in get_sys_info()
/u-boot/board/freescale/ls1046afrwy/
A Deth.c25 srds_s1 = in_be32(&gur->rcwsr[4]) & in board_eth_init()
75 srds_s1 = in_be32(&gur->rcwsr[4]) & in fdt_update_ethernet_dt()
/u-boot/drivers/net/ldpaa_eth/
A Dlx2160a.c91 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR - 1]) in fsl_rgmii_init()
100 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR - 1]) in fsl_rgmii_init()
A Dls1088a.c97 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR]) in fsl_rgmii_init()
106 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR]) in fsl_rgmii_init()
/u-boot/board/freescale/ls1046ardb/
A Deth.c27 srds_s1 = in_be32(&gur->rcwsr[4]) & in board_eth_init()
89 srds_s1 = in_be32(&gur->rcwsr[4]) & in fdt_update_ethernet_dt()
/u-boot/arch/arm/cpu/armv7/ls102xa/
A Dfsl_ls1_serdes.c43 u32 cfg = in_be32(&gur->rcwsr[4]); in serdes_get_first_lane()
82 cfg = in_be32(&gur->rcwsr[4]) & sd_prctl_mask; in serdes_init()
A Dclock.c51 sys_info->freq_systembus *= (in_be32(&gur->rcwsr[0]) >> in get_sys_info()
53 sys_info->freq_ddrbus *= (in_be32(&gur->rcwsr[0]) >> in get_sys_info()
/u-boot/board/freescale/t4rdb/
A Deth.c49 srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) & in board_eth_init()
52 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) & in board_eth_init()
A Dspl.c61 plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; in board_init_f()
/u-boot/board/freescale/ls2080aqds/
A Deth.c506 int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & in initialize_dpmac_to_slot()
509 int serdes2_prtcl = (in_le32(&gur->rcwsr[28]) & in initialize_dpmac_to_slot()
660 int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & in ls2080a_handle_phy_interface_sgmii()
663 int serdes2_prtcl = (in_le32(&gur->rcwsr[28]) & in ls2080a_handle_phy_interface_sgmii()
803 int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & in ls2080a_handle_phy_interface_qsgmii()
868 int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & in ls2080a_handle_phy_interface_xsgmii()
903 int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) & in board_eth_init()
906 int serdes2_prtcl = (in_le32(&gur->rcwsr[28]) & in board_eth_init()
1058 u32 rcw_status = in_le32(&gur->rcwsr[28]); in board_fit_config_name_match()
/u-boot/board/freescale/lx2160a/
A Dlx2160a.c213 sdhc1_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in esdhc_dspi_status_fixup()
232 sdhc2_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR13_REGSR - 1]) in esdhc_dspi_status_fixup()
249 iic5_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in esdhc_dspi_status_fixup()
455 sdhc1_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in config_board_mux()
477 sdhc2_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR13_REGSR - 1]) in config_board_mux()
494 iic5_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in config_board_mux()
/u-boot/drivers/net/fm/
A Dt1040.c15 u32 rcwsr13 = in_be32(&gur->rcwsr[13]); in fman_port_enet_if()
A Dt1024.c39 u32 rcwsr13 = in_be32(&gur->rcwsr[13]); in fman_port_enet_if()
A Dp5020.c50 u32 rcwsr11 = in_be32(&gur->rcwsr[11]); in fman_port_enet_if()
A Dp4080.c54 u32 rcwsr11 = in_be32(&gur->rcwsr[11]); in fman_port_enet_if()
/u-boot/board/freescale/ls1088a/
A Deth_ls1088aqds.c477 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in initialize_dpmac_to_slot()
530 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in ls1088a_handle_phy_interface_sgmii()
582 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in ls1088a_handle_phy_interface_qsgmii()
621 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in ls1088a_handle_phy_interface_xsgmii()
646 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in ls1088a_handle_phy_interface_rgmii()
815 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in board_fit_config_name_match()
A Deth_ls1088ardb.c32 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in board_eth_init()
/u-boot/board/freescale/ls1043ardb/
A Deth.c26 srds_s1 = in_be32(&gur->rcwsr[4]) & in board_eth_init()
/u-boot/board/freescale/t208xrdb/
A Deth_t208xrdb.c38 srds_s1 = in_be32(&gur->rcwsr[4]) & in board_eth_init()
A Dspl.c52 plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; in board_init_f()

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