Searched refs:rdgr1 (Results 1 – 2 of 2) sorted by relevance
29 u32 rdgr1; /* 0x60 rank dqs gating register */ member
374 u32 dgr = readl(rank == 0 ? &dram->rdgr0 : &dram->rdgr1); in mctl_set_dqs_gating_delay()383 writel(dgr, rank == 0 ? &dram->rdgr0 : &dram->rdgr1); in mctl_set_dqs_gating_delay()
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