| /u-boot/drivers/rtc/ |
| A D | s3c24x0_rtc.c | 55 sec = readb(&rtc->bcdsec); in rtc_get()
56 min = readb(&rtc->bcdmin); in rtc_get()
57 hour = readb(&rtc->bcdhour); in rtc_get()
58 mday = readb(&rtc->bcddate); in rtc_get()
59 wday = readb(&rtc->bcdday); in rtc_get()
60 mon = readb(&rtc->bcdmon); in rtc_get()
61 year = readb(&rtc->bcdyear); in rtc_get()
65 a_sec = readb(&rtc->almsec); in rtc_get()
66 a_min = readb(&rtc->almmin); in rtc_get()
69 a_mon = readb(&rtc->almmon); in rtc_get()
[all …]
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| /u-boot/drivers/serial/ |
| A D | serial_arc.c | 56 while (!(readb(®s->status) & UART_TXEMPTY)) in arc_serial_putc()
66 return !(readb(®s->status) & UART_RXEMPTY); in arc_serial_tstc()
73 uint32_t status = readb(®s->status); in arc_serial_pending()
90 if (readb(®s->status) & UART_OVERFLOW_ERR) in arc_serial_getc()
93 return readb(®s->data) & 0xFF; in arc_serial_getc()
151 while (!(readb(®s->status) & UART_TXEMPTY)) in _debug_uart_putc()
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| A D | serial_mcf.c | 101 if (!(readb(&uart->usr) & UART_USR_TXRDY)) in coldfire_serial_putc()
115 if (!(readb(&uart->usr) & UART_USR_RXRDY)) in coldfire_serial_getc()
118 return readb(&uart->urb); in coldfire_serial_getc()
137 return readb(&uart->usr) & UART_USR_RXRDY ? 1 : 0; in coldfire_serial_pending()
139 return readb(&uart->usr) & UART_USR_TXRDY ? 0 : 1; in coldfire_serial_pending()
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| /u-boot/arch/sh/lib/ |
| A D | time.c | 30 writeb(readb(TMU_BASE + TSTR) & ~TSTR_STR0, TMU_BASE + TSTR); in timer_init()
31 writeb(readb(TMU_BASE + TSTR) | TSTR_STR0, TMU_BASE + TSTR); in timer_init()
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| /u-boot/board/astro/mcf5373l/ |
| A D | mcf5373l.c | 154 if (readb(&uart->usr) & UART_USR_TXRDY) in astro_put_char()
167 return readb(&uart->usr) & UART_USR_RXRDY; in astro_is_char()
175 while (!(readb(&uart->usr) & UART_USR_RXRDY)) ; in astro_get_char()
176 return readb(&uart->urb); in astro_get_char()
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| A D | fpga.c | 35 tmp_char = readb(&gpiop->par_timer); in altera_pre_fn()
81 if (readb(&gpiop->ppd_pwm) & 0x08) in altera_status_fn()
91 if (readb(&gpiop->ppd_pwm) & 0x20) in altera_done_fn()
223 return (readb(&gpiop->ppd_pwm) & 0x08) == 0; in xilinx_init_config_fn()
231 return (readb(&gpiop->ppd_pwm) & 0x20) >> 5; in xilinx_done_config_fn()
258 tmp_char = readb(&gpiop->par_timer); in xilinx_pre_config_fn()
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| /u-boot/arch/arm/mach-omap2/omap3/ |
| A D | spl_id_nand.c | 52 *mfr = readb(&gpmc_cfg->cs[0].nand_dat); in identify_nand_chip()
53 *id = readb(&gpmc_cfg->cs[0].nand_dat); in identify_nand_chip()
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| /u-boot/drivers/gpio/ |
| A D | hi6220_gpio.c | 19 data = readb(bank->base + HI6220_GPIO_DIR); in hi6220_gpio_direction_input()
41 data = readb(bank->base + HI6220_GPIO_DIR); in hi6220_gpio_direction_output()
54 return !!readb(bank->base + (BIT(gpio + 2))); in hi6220_gpio_get_value()
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| /u-boot/drivers/i2c/ |
| A D | fsl_i2c.c | 234 while (!(readb(&base->sr) & I2C_SR_MBB)) { in fsl_i2c_fixup()
239 if (readb(&base->sr) & I2C_SR_MAL) { in fsl_i2c_fixup()
247 readb(&base->dr); in fsl_i2c_fixup()
250 while (!(readb(&base->sr) & I2C_SR_MIF)) { in fsl_i2c_fixup()
285 while (readb(&base->sr) & I2C_SR_MBB) { in __i2c_init()
302 while (readb(&base->sr) & I2C_SR_MBB) { in i2c_wait4bus()
317 csr = readb(&base->sr); in i2c_wait()
321 csr = readb(&base->sr); in i2c_wait()
386 readb(&base->dr); in __i2c_read_data()
402 data[i] = readb(&base->dr); in __i2c_read_data()
[all …]
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| A D | mxc_i2c.c | 213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
222 __func__, sr, readb(base + (I2CR << reg_shift)), in wait_for_sr_state()
234 sr, readb(base + (I2CR << reg_shift)), state); in wait_for_sr_state()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
583 temp = readb(base + (I2CR << reg_shift)); in i2c_read_data()
590 readb(base + (I2DR << reg_shift)); in i2c_read_data()
611 temp = readb(base + (I2CR << reg_shift)); in i2c_read_data()
621 temp = readb(base + (I2CR << reg_shift)); in i2c_read_data()
627 buf[i] = readb(base + (I2DR << reg_shift)); in i2c_read_data()
686 temp = readb(base + (I2CR << reg_shift)); in bus_i2c_read()
[all …]
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| A D | sh_i2c.c | 75 if (SH_IC_DTE & readb(&dev->icsr)) in sh_irq_dte()
86 if (SH_IC_DTE & readb(&dev->icsr)) in sh_irq_dte_with_tack()
88 if (SH_IC_TACK & readb(&dev->icsr)) in sh_irq_dte_with_tack()
100 if (!(SH_IC_BUSY & readb(&dev->icsr))) in sh_irq_busy()
195 ret = readb(&dev->icdr) & 0xff; in sh_i2c_raw_read()
198 readb(&dev->icdr); /* Dummy read */ in sh_i2c_raw_read()
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| A D | xilinx_xiic.c | 121 bytes_in_fifo = readb(priv->base + XIIC_RFO_REG_OFFSET) + 1; in xiic_read_rx()
127 msg->buf[pos++] = readb(priv->base + in xiic_read_rx()
138 return IIC_TX_FIFO_DEPTH - readb(priv->base + XIIC_TFO_REG_OFFSET) - 1; in xiic_tx_fifo_space()
240 for (sr = readb(priv->base + XIIC_SR_REG_OFFSET); in xiic_clear_rx_fifo()
242 sr = readb(priv->base + XIIC_SR_REG_OFFSET)) in xiic_clear_rx_fifo()
243 readb(priv->base + XIIC_DRR_REG_OFFSET); in xiic_clear_rx_fifo()
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| A D | rcar_iic.c | 54 if (RCAR_IC_DTE & readb(priv->base + RCAR_IIC_ICSR)) in sh_irq_dte()
67 icsr = readb(priv->base + RCAR_IIC_ICSR); in sh_irq_dte_with_tack()
83 if (!(RCAR_IC_BUSY & readb(priv->base + RCAR_IIC_ICSR))) in sh_irq_busy()
134 msg->buf[i] = readb(priv->base + RCAR_IIC_ICDR) & 0xff; in rcar_iic_read_common()
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| /u-boot/drivers/usb/musb/ |
| A D | musb_udc.c | 115 b = readb(&musbr->faddr); in musb_db_regs()
118 b = readb(&musbr->power); in musb_db_regs()
124 b = readb(&musbr->devctl); in musb_db_regs()
133 b = readb(&musbr->index); in musb_db_regs()
157 power = readb(&musbr->power); in musb_peri_softconnect()
162 readb(&musbr->intrusb); in musb_peri_softconnect()
169 power = readb(&musbr->power); in musb_peri_softconnect()
179 devctl = readb(&musbr->devctl); in musb_peri_softconnect()
263 faddr = readb(&musbr->faddr); in musb_peri_ep0_set_address()
384 faddr = readb(&musbr->faddr); in musb_peri_ep0_idle()
[all …]
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| A D | musb_core.c | 42 devctl = readb(&musbr->devctl); in musb_start()
149 *data++ = readb(&musbr->fifox[ep]); in read_fifo()
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| A D | musb_hcd.h | 36 ((readb(&musbr->power) & MUSB_POWER_HSMODE) \
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| /u-boot/drivers/pci/ |
| A D | pcie_phytium.c | 45 pos = readb(addr + pos); in phytium_pci_skip_dev()
49 id = readb(addr + pos); in phytium_pci_skip_dev()
97 if ((readb(addr + PCI_HEADER_TYPE) & 0x7f) != in pci_phytium_conf_address()
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| /u-boot/arch/microblaze/include/asm/ |
| A D | io.h | 24 #define readb(addr) \ macro
46 #define inb(addr) readb(addr)
64 #define in_8(addr) readb(addr)
81 #define __raw_readb readb
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| /u-boot/drivers/net/ |
| A D | cs8900.c | 58 readb(iob); in get_reg_init_bus()
59 readb(iob + 1); in get_reg_init_bus()
60 readb(iob); in get_reg_init_bus()
61 readb(iob + 1); in get_reg_init_bus()
62 readb(iob); in get_reg_init_bus()
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| /u-boot/include/ |
| A D | iotrace.h | 60 #undef readb
61 #define readb(addr) iotrace_readb((const void *)(uintptr_t)addr) macro
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| /u-boot/arch/xtensa/include/asm/ |
| A D | io.h | 35 #define readb(addr) \ macro
45 #define __raw_readb readb
59 #define inb(port) readb((u8 *)((port)))
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| /u-boot/arch/arm/mach-imx/ |
| A D | cmd_hdmidet.c | 15 return (readb(&hdmi->phy_stat0) & HDMI_DVI_STAT) ? 0 : 1; in do_hdmidet()
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| A D | rdc-sema.c | 67 reg = readb(&imx_rdc_sema->gate[per_id % SEMA_GATES_NUM]); in imx_rdc_sema_lock()
94 reg = readb(&imx_rdc_sema->gate[per_id % SEMA_GATES_NUM]); in imx_rdc_sema_unlock()
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| /u-boot/board/renesas/grpeach/ |
| A D | grpeach.c | 46 readb(RZA1_WDT_BASE + WRCSR); in reset_cpu()
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| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | cpu_rk3288.h | 27 reg = readb(RK3288_HDMI_PHYS + HDMI_CONFIG0_ID); in rockchip_soc_id()
|