/u-boot/drivers/adc/ |
A D | stm32-adc.c | 99 ret = readl_poll_timeout(adc->regs + STM32H7_ADC_ISR, val, in stm32_adc_start_channel() 114 ret = readl_poll_timeout(adc->regs + STM32H7_ADC_ISR, val, in stm32_adc_start_channel() 153 ret = readl_poll_timeout(adc->regs + STM32H7_ADC_ISR, val, in stm32_adc_channel_data()
|
/u-boot/drivers/power/domain/ |
A D | mtk-power-domain.c | 178 return readl_poll_timeout(infracfg + INFRA_TOPAXI_PROT_STA1, val, in mtk_infracfg_set_bus_protection() 189 return readl_poll_timeout(infracfg + INFRA_TOPAXI_PROT_STA1, val, in mtk_infracfg_clear_bus_protection() 248 ret = readl_poll_timeout(ctl_addr, tmp, !(tmp & pdn_ack), 100); in scpsys_power_on() 282 ret = readl_poll_timeout(ctl_addr, tmp, (tmp & pdn_ack) == pdn_ack, in scpsys_power_off()
|
/u-boot/drivers/spi/ |
A D | mtk_snfi_spi.c | 107 ret = readl_poll_timeout(priv->base + SNFI_MAC_CTL, val, in mtk_snfi_mac_trigger() 114 ret = readl_poll_timeout(priv->base + SNFI_MAC_CTL, val, in mtk_snfi_mac_trigger() 136 ret = readl_poll_timeout(priv->base + SNF_STA_CTL1, val, in mtk_snfi_mac_reset()
|
A D | mtk_snor.c | 135 ret = readl_poll_timeout(priv->base + MTK_NOR_REG_CMD, reg, in mtk_snor_cmd_exec() 252 ret = readl_poll_timeout(priv->base + MTK_NOR_REG_DMA_CTL, reg, in mtk_snor_dma_exec() 326 ret = readl_poll_timeout(priv->base + MTK_NOR_REG_CFG2, val, in mtk_snor_write_buffer_enable() 342 ret = readl_poll_timeout(priv->base + MTK_NOR_REG_CFG2, val, in mtk_snor_write_buffer_disable() 516 ret = readl_poll_timeout(priv->base + MTK_NOR_REG_IRQ_STAT, reg, in mtk_snor_probe()
|
A D | stm32_qspi.c | 138 ret = readl_poll_timeout(&priv->regs->sr, sr, in _stm32_qspi_wait_for_not_busy() 156 ret = readl_poll_timeout(&priv->regs->sr, sr, in _stm32_qspi_wait_cmd() 201 ret = readl_poll_timeout(&priv->regs->sr, sr, in _stm32_qspi_poll() 320 timeout = readl_poll_timeout(&priv->regs->cr, cr, in stm32_qspi_exec_op()
|
/u-boot/drivers/video/meson/ |
A D | meson_vclk.c | 230 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_venci_cvbs_clock_config() 248 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_venci_cvbs_clock_config() 262 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_venci_cvbs_clock_config() 451 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_hdmi_pll_set_params() 469 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_hdmi_pll_set_params() 509 if (!readl_poll_timeout( in meson_hdmi_pll_set_params()
|
/u-boot/drivers/video/ |
A D | dw_mipi_dsi.c | 313 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, in dw_mipi_dsi_gen_pkt_hdr_write() 325 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, in dw_mipi_dsi_gen_pkt_hdr_write() 357 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, in dw_mipi_dsi_write() 380 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, in dw_mipi_dsi_read() 390 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, in dw_mipi_dsi_read() 721 ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val, in dw_mipi_dsi_dphy_enable() 727 ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, in dw_mipi_dsi_dphy_enable()
|
/u-boot/drivers/misc/imx8/ |
A D | scu.c | 60 ret = readl_poll_timeout(&base->sr, val, val & mask, 10000); in mu_hal_sendmsg() 80 ret = readl_poll_timeout(&base->sr, val, val & mask, 1000000); in mu_hal_receivemsg()
|
/u-boot/drivers/rng/ |
A D | rockchip_rng.c | 94 retval = readl_poll_timeout(pdata->base + CRYPTO_V1_CTRL, reg, in rk_v1_rng_read() 128 retval = readl_poll_timeout(pdata->base + CRYPTO_V2_RNG_CTL, reg, in rk_v2_rng_read()
|
A D | stm32mp1_rng.c | 47 retval = readl_poll_timeout(pdata->base + RNG_SR, sr, in stm32_rng_read()
|
/u-boot/drivers/mtd/nand/raw/ |
A D | cortina_nand.c | 72 if (readl_poll_timeout(®->flash_flash_access_start, reg_v, in nand_waitfor_cmd_completion() 265 readl_poll_timeout(&info->reg->flash_nf_ecc_reset, reg_v, in ca_nand_command() 617 ret = readl_poll_timeout(&info->reg->flash_nf_ecc_reset, reg_v, in ca_do_bch_decode() 634 ret = readl_poll_timeout(&info->reg->flash_nf_bch_status, reg_v, in ca_do_bch_decode() 856 readl_poll_timeout(&info->dma_nand->dma_q_txq_coal_interrupt, in nand_rw_page() 867 readl_poll_timeout(&info->dma_nand->dma_q_rxq_coal_interrupt, reg_v, in nand_rw_page() 889 readl_poll_timeout(&info->reg->flash_nf_bch_status, in nand_rw_page() 915 readl_poll_timeout(&info->dma_nand->dma_q_txq_coal_interrupt, in nand_rw_page() 926 readl_poll_timeout(&info->dma_nand->dma_q_rxq_coal_interrupt, in nand_rw_page()
|
/u-boot/drivers/reset/ |
A D | reset-hsdk.c | 60 return readl_poll_timeout(rst->regs_rst + CGU_IP_SW_RESET, reg, in hsdk_reset_do()
|
/u-boot/include/linux/ |
A D | iopoll.h | 61 #define readl_poll_timeout(addr, val, cond, timeout_us) \ macro
|
/u-boot/drivers/watchdog/ |
A D | stm32mp_wdt.c | 79 ret = readl_poll_timeout(priv->base + IWDG_SR, val, in stm32mp_wdt_start()
|
/u-boot/drivers/mmc/ |
A D | sdhci-cadence.c | 104 ret = readl_poll_timeout(reg, tmp, tmp & SDHCI_CDNS_HRS04_ACK, 10); in sdhci_cdns_write_phy_reg() 195 ret = readl_poll_timeout(reg, tmp, in sdhci_cdns_set_tune_val()
|
/u-boot/arch/arm/mach-stm32mp/ |
A D | bsec.c | 156 return readl_poll_timeout(base + BSEC_OTP_STATUS_OFF, in bsec_power_safmem() 190 ret = readl_poll_timeout(base + BSEC_OTP_STATUS_OFF, in bsec_shadow_register() 270 ret = readl_poll_timeout(base + BSEC_OTP_STATUS_OFF, in bsec_program_otp()
|
/u-boot/drivers/power/regulator/ |
A D | stm32-vrefbuf.c | 71 ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val, in stm32_vrefbuf_set_enable()
|
/u-boot/drivers/i2c/ |
A D | i2c-uniphier-f.c | 83 ret = readl_poll_timeout(&priv->regs->sr, val, !(val & I2C_SR_DB), 100); in uniphier_fi2c_check_bus_busy() 123 ret = readl_poll_timeout(&priv->regs->intr, irq, irq & flags, in wait_for_irq()
|
/u-boot/drivers/usb/mtu3/ |
A D | mtu3_plat.c | 48 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value, in ssusb_check_clocks() 55 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value, in ssusb_check_clocks()
|
/u-boot/drivers/rtc/ |
A D | stm32_rtc.c | 118 return readl_poll_timeout(priv->base + STM32_RTC_ISR, in stm32_rtc_enter_init_mode() 139 return readl_poll_timeout(priv->base + STM32_RTC_ISR, in stm32_rtc_wait_sync()
|
/u-boot/drivers/video/stm32/ |
A D | stm32_dsi.c | 222 ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_RRS, in dsi_phy_init() 231 ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_PLLLS, in dsi_phy_init()
|
/u-boot/drivers/pci/ |
A D | pcie_mediatek.c | 183 err = readl_poll_timeout(port->base + PCIE_APP_TLP_REQ, val, in mtk_pcie_check_cfg_cpld() 343 err = readl_poll_timeout(port->base + PCIE_LINK_STATUS, val, in mtk_pcie_startup_port() 417 err = readl_poll_timeout(port->base + PCIE_LINK_STATUS_V2, val, in mtk_pcie_startup_port_v2()
|
A D | pcie_brcmstb.c | 301 ret = readl_poll_timeout(base + PCIE_RC_DL_MDIO_RD_DATA, data, in brcm_pcie_mdio_read() 328 return readl_poll_timeout(base + PCIE_RC_DL_MDIO_WR_DATA, data, in brcm_pcie_mdio_write()
|
/u-boot/drivers/usb/cdns3/ |
A D | drd.c | 24 #define readl_poll_timeout_atomic readl_poll_timeout
|
/u-boot/drivers/ram/stm32mp1/ |
A D | stm32mp1_ddr.c | 561 ret = readl_poll_timeout(&phy->pgsr, pgsr, in ddrphy_idone_wait() 601 ret = readl_poll_timeout(&ctl->swstat, swstat, in wait_sw_done_ack() 631 ret = readl_poll_timeout(&priv->ctl->stat, stat, in wait_operating_mode()
|