Home
last modified time | relevance | path

Searched refs:readq (Results 1 – 25 of 37) sorted by relevance

12

/u-boot/drivers/net/octeontx/
A Dxcv.c31 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); in xcv_init_hw()
36 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); in xcv_init_hw()
51 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); in xcv_init_hw()
54 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); in xcv_init_hw()
62 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); in xcv_init_hw()
67 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); in xcv_init_hw()
92 xcv_ctl.u = readq(XCVX_BASE + XCVX_CTL(0)); in xcv_setup_link()
102 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); in xcv_setup_link()
108 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); in xcv_setup_link()
118 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); in xcv_setup_link()
[all …]
A Dsmi.c106 smix_clk.u = readq(priv->baseaddr + SMI_X_CLK); in octeontx_smi_setmode()
135 smix_wr_dat.u = readq(priv->baseaddr + SMI_X_WR_DAT); in octeontx_c45_addr()
181 smix_rd_dat.u = readq(priv->baseaddr + SMI_X_RD_DAT); in octeontx_phy_read()
233 smix_wr_dat.u = readq(priv->baseaddr + SMI_X_WR_DAT); in octeontx_phy_write()
A Dbgx.c77 return readq((void *)addr); in bgx_reg_read()
124 reg_val = readq(reg) >> bit; in gser_poll_reg()
292 cfg = readq(GSERX_CFG(qlm)) & GSERX_CFG_BGX; in get_qlm_for_bgx()
297 if (readq(GSERX_PHY_CTL(qlm))) in get_qlm_for_bgx()
609 rctl = readq(GSER_BR_RXX_CTL(qlm, l)); in __rx_equalization()
614 reer = readq(GSER_BR_RXX_EER(qlm, l)); in __rx_equalization()
628 reer = readq(GSER_BR_RXX_EER(qlm, l)); in __rx_equalization()
631 rctl = readq(GSER_BR_RXX_CTL(qlm, l)); in __rx_equalization()
1308 train_en = (readq(GSERX_SCRATCH(lmac->qlm))) & 0xf; in bgx_get_qlm_mode()
/u-boot/arch/arm/mach-octeontx2/
A Dclock.c20 rst_boot.u = readq(RST_BOOT); in octeontx_get_io_clock()
32 rst_boot.u = readq(RST_BOOT); in octeontx_get_core_clock()
/u-boot/arch/arm/mach-octeontx/
A Dclock.c20 rst_boot.u = readq(RST_BOOT); in octeontx_get_io_clock()
32 rst_boot.u = readq(RST_BOOT); in octeontx_get_core_clock()
/u-boot/drivers/spi/
A Docteon_spi.c128 mpi_sts = readq(base + MPI_STS); in octeon_spi_wait_ready()
156 mpi_cfg = readq(base + MPI_CFG); in octeon_spi_claim_bus()
160 mpi_cfg = readq(base + MPI_CFG); in octeon_spi_claim_bus()
187 mpi_cfg = readq(base + MPI_CFG); in octeon_spi_release_bus()
190 mpi_cfg = readq(base + MPI_CFG); in octeon_spi_release_bus()
218 if (mpi_cfg != readq(base + MPI_CFG)) { in octeon_spi_xfer()
220 mpi_cfg = readq(base + MPI_CFG); in octeon_spi_xfer()
249 wide_dat = readq(base + MPI_WIDE_DAT); in octeon_spi_xfer()
321 if (mpi_cfg != readq(base + MPI_CFG)) { in octeontx2_spi_xfer()
323 mpi_cfg = readq(base + MPI_CFG); in octeontx2_spi_xfer()
[all …]
/u-boot/drivers/timer/
A Dandes_plmt_timer.c23 return readq((void __iomem *)MTIME_REG(dev_get_priv(dev))); in andes_plmt_get_count()
41 return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE)); in timer_early_get_count()
A Dsifive_clint_timer.c20 return readq((void __iomem *)MTIME_REG(dev_get_priv(dev))); in sifive_clint_get_count()
38 return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE)); in timer_early_get_count()
/u-boot/drivers/gpio/
A Docteon_gpio.c113 u64 reg = readq(gpio->base + gpio->data->reg_offs + in octeon_gpio_get_value()
137 u64 val = readq(gpio->base + gpio->data->gpio_bit_cfg_offs + in octeon_gpio_get_function()
188 uc_priv->gpio_count = readq(priv->base + in octeon_gpio_probe()
/u-boot/drivers/net/octeontx2/
A Dnix.h255 u64 val = readq(nix_af->nix_af_base + offset); in nix_af_reg_read()
272 u64 val = readq(nix->nix_base + offset); in nix_pf_reg_read()
289 u64 val = readq(npa_af->npa_af_base + offset); in npa_af_reg_read()
306 u64 val = readq(nix_af->npc_af_base + offset); in npc_af_reg_read()
A Dcgx.h76 return readq(cgx->reg_base + CMR_SHIFT(lmac) + offset); in cgx_read()
A Dcgx_intf.c29 return readq(addr); in cgx_rd_scrx()
84 cmrx_int = readq(CGX_CMR_INT + in wait_for_ownership()
170 cmrx_int = readq(CGX_CMR_INT + CGX_SHIFT(cgx) + CMR_SHIFT(lmac)); in cgx_intf_req()
/u-boot/include/linux/
A Dio.h30 return readq(addr); in ioread64()
A Diopoll.h65 readx_poll_timeout(readq, addr, val, cond, timeout_us)
/u-boot/include/fsl-mc/
A Dfsl_mc_cmd.h152 resp->header = readq(&portal->header); in mc_read_response()
159 resp->params[i] = readq(&portal->params[i]); in mc_read_response()
/u-boot/arch/x86/cpu/apollolake/
A Dacpi.c163 u64 gfxvtbar = readq(MCHBAR_REG(GFXVTBAR)) & VTBAR_MASK; in apl_acpi_fill_dmar()
164 u64 defvtbar = readq(MCHBAR_REG(DEFVTBAR)) & VTBAR_MASK; in apl_acpi_fill_dmar()
/u-boot/board/phytium/durian/
A Ddurian.c92 pstate = readq(HNF_PSTATE_STAT + i * HNF_STRIDE); in __asm_flush_l3_dcache()
/u-boot/drivers/core/
A Dregmap.c371 #if defined(in_le64) && defined(in_be64) && defined(readq)
380 return readq(addr); in __read_64()
383 return readq(addr); in __read_64()
418 #if defined(in_le64) && defined(in_be64) && defined(readq) in regmap_raw_read_range()
/u-boot/drivers/mmc/
A Docteontx_hsmmc.c249 u64 value = readq(host->base_addr + reg); in read_csr()
447 emm_cfg.u = readq(host->base_addr + MIO_EMM_CFG()); in octeontx_mmc_print_registers2()
502 emm_dma.u = readq(host->base_addr + MIO_EMM_DMA()); in octeontx_mmc_print_registers2()
523 emm_cmd.u = readq(host->base_addr + MIO_EMM_CMD()); in octeontx_mmc_print_registers2()
590 emm_int.u = readq(host->base_addr + MIO_EMM_INT()); in octeontx_mmc_print_registers2()
607 emm_wdog.u = readq(host->base_addr + MIO_EMM_WDOG()); in octeontx_mmc_print_registers2()
624 emm_rca.u = readq(host->base_addr + MIO_EMM_RCA()); in octeontx_mmc_print_registers2()
629 emm_calb.u = readq(host->base_addr + MIO_EMM_CALB()); in octeontx_mmc_print_registers2()
634 emm_tap.u = readq(host->base_addr + MIO_EMM_TAP()); in octeontx_mmc_print_registers2()
649 io_ctl.u = readq(host->base_addr + MIO_EMM_IO_CTL()); in octeontx_mmc_print_registers2()
[all …]
/u-boot/drivers/mtd/nand/raw/
A Docteontx_nand.c380 (val) = readq(__addr); \
384 (val) = readq(__addr); \
621 ndf_misc = readq(tn->base + NDF_MISC); in ndf_cmd_queue_free()
698 dma_cfg = readq(tn->base + NDF_DMA_CFG); in ndf_dma_done()
1067 end = readq(tn->base + NDF_DMA_ADR); in ndf_read()
1974 readq(tn->base + NDF_MISC)); in octeontx_nfc_chip_init()
2040 ndf_misc = readq(tn->base + NDF_MISC); in octeontx_nfc_init()
2045 debug("%s: NDF_MISC: 0x%llx\n", __func__, readq(tn->base + NDF_MISC)); in octeontx_nfc_init()
2152 dma_cfg = readq(tn->base + NDF_DMA_CFG); in octeontx_pci_nand_disable()
2158 ndf_misc = readq(tn->base + NDF_MISC); in octeontx_pci_nand_disable()
[all …]
A Docteontx_bch.c101 return readq(bch->reg_base + BCH_BIST_RESULT); in bch_check_bist_status()
374 ctl.u = readq(vf->reg_base + BCH_VQX_CTL(0)); in octeontx_pci_bchvf_probe()
/u-boot/arch/mips/include/asm/
A Dio.h364 #define readq_relaxed readq in BUILDIO_MEM()
392 #define readq readq in BUILDIO_MEM() macro
/u-boot/arch/arm/lib/
A Dgic-v3-its.c174 tmp = readq((uintptr_t)(pend_base + offset)); in gic_lpi_tables_init()
/u-boot/arch/x86/include/asm/
A Dio.h63 #define readq(addr) (*(volatile u64 *)(uintptr_t)(addr)) macro
67 #define __raw_readq readq
/u-boot/drivers/i2c/
A Docteon_i2c.c264 val = readq(base + TWSI_SW_TWSI); in twsi_write_sw()
289 val = readq(base + TWSI_SW_TWSI); in twsi_read_sw()

Completed in 38 milliseconds

12