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Searched refs:reg1 (Results 1 – 19 of 19) sorted by relevance

/u-boot/post/lib_powerpc/
A Drlwimi.c64 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_rlwimi() local
73 ASM_STW(reg1, stk, 0), in cpu_post_test_rlwimi()
74 ASM_LWZ(reg1, stk, 8), in cpu_post_test_rlwimi()
76 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), in cpu_post_test_rlwimi()
77 ASM_STW(reg1, stk, 8), in cpu_post_test_rlwimi()
78 ASM_LWZ(reg1, stk, 0), in cpu_post_test_rlwimi()
92 ASM_STW(reg1, stk, 0), in cpu_post_test_rlwimi()
93 ASM_LWZ(reg1, stk, 8), in cpu_post_test_rlwimi()
95 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me) | in cpu_post_test_rlwimi()
97 ASM_STW(reg1, stk, 8), in cpu_post_test_rlwimi()
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A Dsrawi.c63 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_srawi() local
71 ASM_STW(reg1, stk, 0), in cpu_post_test_srawi()
73 ASM_11S(test->cmd, reg1, reg0, test->op2), in cpu_post_test_srawi()
74 ASM_STW(reg1, stk, 8), in cpu_post_test_srawi()
75 ASM_LWZ(reg1, stk, 0), in cpu_post_test_srawi()
88 ASM_STW(reg1, stk, 0), in cpu_post_test_srawi()
90 ASM_11S(test->cmd, reg1, reg0, test->op2) | BIT_C, in cpu_post_test_srawi()
91 ASM_STW(reg1, stk, 8), in cpu_post_test_srawi()
92 ASM_LWZ(reg1, stk, 0), in cpu_post_test_srawi()
A Dtwo.c83 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_two() local
91 ASM_STW(reg1, stk, 0), in cpu_post_test_two()
93 ASM_11(test->cmd, reg1, reg0), in cpu_post_test_two()
94 ASM_STW(reg1, stk, 8), in cpu_post_test_two()
95 ASM_LWZ(reg1, stk, 0), in cpu_post_test_two()
108 ASM_STW(reg1, stk, 0), in cpu_post_test_two()
110 ASM_11(test->cmd, reg1, reg0) | BIT_C, in cpu_post_test_two()
111 ASM_STW(reg1, stk, 8), in cpu_post_test_two()
112 ASM_LWZ(reg1, stk, 0), in cpu_post_test_two()
A Dtwox.c83 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_twox() local
91 ASM_STW(reg1, stk, 0), in cpu_post_test_twox()
93 ASM_11X(test->cmd, reg1, reg0), in cpu_post_test_twox()
94 ASM_STW(reg1, stk, 8), in cpu_post_test_twox()
95 ASM_LWZ(reg1, stk, 0), in cpu_post_test_twox()
108 ASM_STW(reg1, stk, 0), in cpu_post_test_twox()
110 ASM_11X(test->cmd, reg1, reg0) | BIT_C, in cpu_post_test_twox()
111 ASM_STW(reg1, stk, 8), in cpu_post_test_twox()
112 ASM_LWZ(reg1, stk, 0), in cpu_post_test_twox()
A Drlwinm.c61 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_rlwinm() local
69 ASM_STW(reg1, stk, 0), in cpu_post_test_rlwinm()
71 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), in cpu_post_test_rlwinm()
72 ASM_STW(reg1, stk, 8), in cpu_post_test_rlwinm()
73 ASM_LWZ(reg1, stk, 0), in cpu_post_test_rlwinm()
86 ASM_STW(reg1, stk, 0), in cpu_post_test_rlwinm()
88 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, in cpu_post_test_rlwinm()
90 ASM_STW(reg1, stk, 8), in cpu_post_test_rlwinm()
91 ASM_LWZ(reg1, stk, 0), in cpu_post_test_rlwinm()
A Drlwnm.c62 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_rlwnm() local
72 ASM_STW(reg1, stk, 4), in cpu_post_test_rlwnm()
74 ASM_LWZ(reg1, stk, 12), in cpu_post_test_rlwnm()
76 ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me), in cpu_post_test_rlwnm()
79 ASM_LWZ(reg1, stk, 4), in cpu_post_test_rlwnm()
93 ASM_STW(reg1, stk, 4), in cpu_post_test_rlwnm()
95 ASM_LWZ(reg1, stk, 12), in cpu_post_test_rlwnm()
97 ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me) | in cpu_post_test_rlwnm()
101 ASM_LWZ(reg1, stk, 4), in cpu_post_test_rlwnm()
A Dthreex.c127 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_threex() local
137 ASM_STW(reg1, stk, 4), in cpu_post_test_threex()
139 ASM_LWZ(reg1, stk, 12), in cpu_post_test_threex()
141 ASM_12X(test->cmd, reg2, reg1, reg0), in cpu_post_test_threex()
144 ASM_LWZ(reg1, stk, 4), in cpu_post_test_threex()
158 ASM_STW(reg1, stk, 4), in cpu_post_test_threex()
160 ASM_LWZ(reg1, stk, 12), in cpu_post_test_threex()
162 ASM_12X(test->cmd, reg2, reg1, reg0) | BIT_C, in cpu_post_test_threex()
165 ASM_LWZ(reg1, stk, 4), in cpu_post_test_threex()
A Dthree.c157 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_three() local
167 ASM_STW(reg1, stk, 4), in cpu_post_test_three()
169 ASM_LWZ(reg1, stk, 12), in cpu_post_test_three()
171 ASM_12(test->cmd, reg2, reg1, reg0), in cpu_post_test_three()
174 ASM_LWZ(reg1, stk, 4), in cpu_post_test_three()
188 ASM_STW(reg1, stk, 4), in cpu_post_test_three()
190 ASM_LWZ(reg1, stk, 12), in cpu_post_test_three()
192 ASM_12(test->cmd, reg2, reg1, reg0) | BIT_C, in cpu_post_test_three()
195 ASM_LWZ(reg1, stk, 4), in cpu_post_test_three()
A Dthreei.c77 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_threei() local
85 ASM_STW(reg1, stk, 0), in cpu_post_test_threei()
87 ASM_11IX(test->cmd, reg1, reg0, test->op2), in cpu_post_test_threei()
88 ASM_STW(reg1, stk, 8), in cpu_post_test_threei()
89 ASM_LWZ(reg1, stk, 0), in cpu_post_test_threei()
A Dandi.c63 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_andi() local
71 ASM_STW(reg1, stk, 0), in cpu_post_test_andi()
73 ASM_11IX(test->cmd, reg1, reg0, test->op2), in cpu_post_test_andi()
74 ASM_STW(reg1, stk, 8), in cpu_post_test_andi()
75 ASM_LWZ(reg1, stk, 0), in cpu_post_test_andi()
/u-boot/board/mscc/jr2/
A Djr2.c44 void __iomem *reg0, *reg1; in vcoreiii_gpio_set_alternate() local
49 reg1 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT(1); in vcoreiii_gpio_set_alternate()
54 reg1 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT1(1); in vcoreiii_gpio_set_alternate()
57 val1 = readl(reg1); in vcoreiii_gpio_set_alternate()
60 writel(val1 & ~mask, reg1); in vcoreiii_gpio_set_alternate()
63 writel(val1 | mask, reg1); in vcoreiii_gpio_set_alternate()
66 writel(val1 | mask, reg1); in vcoreiii_gpio_set_alternate()
69 writel(val1 & ~mask, reg1); in vcoreiii_gpio_set_alternate()
/u-boot/drivers/mtd/nand/raw/
A Dnand_ecc.c68 uint8_t idx, reg1, reg2, reg3, tmp1, tmp2; in nand_calculate_ecc() local
72 reg1 = reg2 = reg3 = 0; in nand_calculate_ecc()
78 reg1 ^= (idx & 0x3f); in nand_calculate_ecc()
109 ecc_code[2] = ((~reg1) << 2) | 0x03; in nand_calculate_ecc()
/u-boot/arch/arm/lib/
A Dmemcpy.S20 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
21 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
24 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
25 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
36 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
37 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
44 .macro enter reg1 reg2
45 stmdb sp!, {r0, \reg1, \reg2}
48 .macro exit reg1 reg2
49 ldmfd sp!, {r0, \reg1, \reg2}
/u-boot/arch/arm/mach-keystone/
A Dclock.c39 setbits_le32(keystone_pll_regs[PASS_PLL].reg1, CFG_PLLCTL1_PAPLL_MASK); in pll_pa_clk_sel()
83 clrsetbits_le32(keystone_pll_regs[data->pll].reg1, in configure_mult_div()
105 setbits_le32(keystone_pll_regs[data->pll].reg1, in configure_main_pll()
171 setbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_ENSAT_MASK); in configure_secondary_pll()
184 setbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_RST_MASK); in configure_secondary_pll()
192 clrbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_RST_MASK); in configure_secondary_pll()
/u-boot/drivers/sound/
A Dwm8994.c425 int reg1 = 0; in configure_aif_clock() local
437 reg1 |= SEL_MCLK1; in configure_aif_clock()
442 reg1 |= SEL_MCLK2; in configure_aif_clock()
447 reg1 |= SEL_FLL1; in configure_aif_clock()
452 reg1 |= SEL_FLL2; in configure_aif_clock()
465 reg1 |= WM8994_AIF1CLK_DIV; in configure_aif_clock()
472 reg1); in configure_aif_clock()
/u-boot/arch/arm/include/asm/mach-imx/
A Dsys_proto.h213 unsigned long reg1, unsigned long reg2,
216 unsigned long *reg1, unsigned long reg2,
/u-boot/arch/arm/mach-keystone/include/mach/
A Dclock.h108 u32 reg1; member
/u-boot/drivers/tee/optee/
A Dcore.c51 static void *reg_pair_to_ptr(u32 reg0, u32 reg1) in reg_pair_to_ptr() argument
53 return (void *)(ulong)(((u64)reg0 << 32) | reg1); in reg_pair_to_ptr()
62 static void reg_pair_from_64(u32 *reg0, u32 *reg1, u64 val) in reg_pair_from_64() argument
65 *reg1 = val; in reg_pair_from_64()
/u-boot/include/
A Dppc_asm.tmpl164 #define EXCEPTION_PROLOG(reg1, reg2) \
184 mfspr r22,reg1; \

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