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Searched refs:reg32 (Results 1 – 11 of 11) sorted by relevance

/u-boot/drivers/video/
A Divybridge_igd.c281 u32 reg32; in gma_pm_init_pre_vbios() local
372 reg32 &= 0xf; in gma_pm_init_pre_vbios()
445 reg32 >>= 16; in gma_pm_init_pre_vbios()
447 reg32 <<= 25; in gma_pm_init_pre_vbios()
489 if (!reg32) { in gma_pm_init_post_vbios()
504 if (!reg32) { in gma_pm_init_post_vbios()
516 if (!reg32) { in gma_pm_init_post_vbios()
536 if (reg32) { in gma_pm_init_post_vbios()
541 if (reg32) { in gma_pm_init_post_vbios()
659 u32 reg32; in sandybridge_setup_graphics() local
[all …]
A Dbroadwell_igd.c362 u32 reg32; in igd_setup_panel() local
365 reg32 = (plat->dp_hotplug[0] & 0x7) << 2; in igd_setup_panel()
366 reg32 |= (plat->dp_hotplug[1] & 0x7) << 10; in igd_setup_panel()
368 gtt_write(priv, PCH_PORT_HOTPLUG, reg32); in igd_setup_panel()
371 reg32 = (plat->port_select & 0x3) << 30; in igd_setup_panel()
374 gtt_write(priv, PCH_PP_ON_DELAYS, reg32); in igd_setup_panel()
379 gtt_write(priv, PCH_PP_OFF_DELAYS, reg32); in igd_setup_panel()
383 reg32 = gtt_read(priv, PCH_PP_DIVISOR); in igd_setup_panel()
384 reg32 &= ~0xff; in igd_setup_panel()
385 reg32 |= plat->power_cycle_delay & 0xff; in igd_setup_panel()
[all …]
/u-boot/arch/x86/cpu/broadwell/
A Dsata.c46 u32 reg32; in broadwell_sata_init() local
67 reg32 |= 1 << 23; in broadwell_sata_init()
77 reg32 = 0x183; in broadwell_sata_init()
84 abar = (u8 *)reg32; in broadwell_sata_init()
173 reg32 &= 0xffff0000; in broadwell_sata_init()
174 reg32 |= 0x880a; in broadwell_sata_init()
179 reg32 |= (1 << 3); in broadwell_sata_init()
184 reg32 |= (1 << 0); in broadwell_sata_init()
189 reg32 |= (1 << 1); in broadwell_sata_init()
204 reg32 |= 1 << 29; in broadwell_sata_init()
[all …]
A Dpch.c114 u32 reg32; in pch_enable_ioapic() local
120 reg32 = io_apic_read(0x01); in pch_enable_ioapic()
123 reg32 &= ~0x00ff0000; in pch_enable_ioapic()
124 reg32 |= 0x00270000; in pch_enable_ioapic()
126 io_apic_write(0x01, reg32); in pch_enable_ioapic()
381 u32 reg32; in pch_cg_init() local
413 reg32 = readl(RCB_REG(CG)); in pch_cg_init()
418 reg32 |= 1 << 31; /* LP LPC */ in pch_cg_init()
421 reg32 &= ~(1 << 29); in pch_cg_init()
423 reg32 |= 1 << 29; in pch_cg_init()
[all …]
/u-boot/arch/x86/cpu/ivybridge/
A Dsata.c22 u32 reg32; in common_sata_init() local
46 u32 reg32; in bd82x6x_sata_init() local
84 reg32 &= ~0x00f00000; in bd82x6x_sata_init()
94 reg32 &= ~0x00000002; in bd82x6x_sata_init()
98 reg32 &= ~0x00000005; in bd82x6x_sata_init()
169 reg32 &= 0xff000000; in bd82x6x_sata_init()
170 reg32 |= 0x5555aa; in bd82x6x_sata_init()
174 reg32 &= 0xffff0000; in bd82x6x_sata_init()
175 reg32 |= 0xcccc; in bd82x6x_sata_init()
178 reg32 &= 0x0000ffff; in bd82x6x_sata_init()
[all …]
A Dlpc.c33 u32 reg32; in pch_enable_apic() local
135 u32 reg32; in pch_power_options() local
352 u32 reg32; in enable_clock_gating() local
367 reg32 |= (1 << 31); in enable_clock_gating()
370 reg32 |= (1 << 16); in enable_clock_gating()
371 reg32 |= (1 << 17); in enable_clock_gating()
372 reg32 |= (1 << 18); in enable_clock_gating()
373 reg32 |= (1 << 22); in enable_clock_gating()
374 reg32 |= (1 << 23); in enable_clock_gating()
376 reg32 |= (1 << 19); in enable_clock_gating()
[all …]
/u-boot/board/tqc/tqm834x/
A Dpci.c58 u32 reg32; in pci_init_board() local
70 reg32 = OCCR_PCICOE1; in pci_init_board()
73 reg32 = 0xff000000; in pci_init_board()
78 reg32 |= (OCCR_PCI1CR | OCCR_PCI2CR); in pci_init_board()
80 reg32 |= (OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 \ in pci_init_board()
85 clk->occr = reg32; in pci_init_board()
/u-boot/drivers/sysreset/
A Dsysreset_x86.c32 u32 reg32; in pch_sysreset_power_off() local
57 reg32 = inl(pm.base + pm.pm1_cnt_ofs); in pch_sysreset_power_off()
60 reg32 &= ~(SLP_EN | SLP_TYP); in pch_sysreset_power_off()
61 reg32 |= SLP_TYP_S5; in pch_sysreset_power_off()
62 outl(reg32, pm.base + pm.pm1_cnt_ofs); in pch_sysreset_power_off()
65 reg32 |= SLP_EN; in pch_sysreset_power_off()
66 outl(reg32, pm.base + pm.pm1_cnt_ofs); in pch_sysreset_power_off()
/u-boot/drivers/sound/
A Dhda_codec.c90 u32 reg32 = readl(&regs->icii); in hda_wait_for_ready() local
92 if (!(reg32 & HDA_ICII_BUSY)) in hda_wait_for_ready()
103 u32 reg32; in wait_for_response() local
110 reg32 = readl(&regs->icii); in wait_for_response()
111 if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == in wait_for_response()
130 u32 reg32; in set_bits() local
141 reg32 = readl(port) & mask; in set_bits()
142 } while (reg32 != val && --count); in set_bits()
/u-boot/drivers/serial/
A Dserial_lpuart.c473 struct lpuart_fsl_reg32 *reg32 = plat->reg; in lpuart_serial_pending() local
480 lpuart_read32(plat->flags, &reg32->stat, &stat); in lpuart_serial_pending()
/u-boot/drivers/bios_emulator/x86emu/
A Dops.c2218 u32 *reg32; in x86emuOp_xchg_word_AX_register() local
2220 reg32 = DECODE_RM_LONG_REGISTER(op1); in x86emuOp_xchg_word_AX_register()
2224 M.x86.R_EAX = *reg32; in x86emuOp_xchg_word_AX_register()
2225 *reg32 = tmp; in x86emuOp_xchg_word_AX_register()
3049 u32 *reg32; in x86emuOp_mov_word_register_IMM() local
3050 reg32 = DECODE_RM_LONG_REGISTER(op1); in x86emuOp_mov_word_register_IMM()
3054 *reg32 = srcval; in x86emuOp_mov_word_register_IMM()

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