Searched refs:reg5 (Results 1 – 7 of 7) sorted by relevance
| /u-boot/board/freescale/ls1043ardb/ |
| A D | cpld.c | 32 u8 reg5 = (u8)(reg >> 1); in cpld_set_altbank() local
36 cpld_rev_bit(®5); in cpld_set_altbank()
40 CPLD_WRITE(cfg_rcw_src1, reg5); in cpld_set_altbank()
54 u8 reg5 = (u8)(reg >> 1); in cpld_set_defbank() local
57 cpld_rev_bit(®5); in cpld_set_defbank()
61 CPLD_WRITE(cfg_rcw_src1, reg5); in cpld_set_defbank()
72 u8 reg5 = (u8)(reg >> 1); in cpld_set_nand() local
75 cpld_rev_bit(®5); in cpld_set_nand()
79 CPLD_WRITE(cfg_rcw_src1, reg5); in cpld_set_nand()
88 u8 reg5 = (u8)(reg >> 1); in cpld_set_sd() local
[all …]
|
| /u-boot/board/freescale/ls1046ardb/ |
| A D | cpld.c | 32 u8 reg5 = (u8)(reg >> 1); in cpld_set_altbank() local
36 cpld_rev_bit(®5); in cpld_set_altbank()
40 CPLD_WRITE(cfg_rcw_src1, reg5); in cpld_set_altbank()
54 u8 reg5 = (u8)(reg >> 1); in cpld_set_defbank() local
57 cpld_rev_bit(®5); in cpld_set_defbank()
61 CPLD_WRITE(cfg_rcw_src1, reg5); in cpld_set_defbank()
72 u8 reg5 = (u8)(reg >> 1); in cpld_set_sd() local
75 cpld_rev_bit(®5); in cpld_set_sd()
79 CPLD_WRITE(cfg_rcw_src1, reg5); in cpld_set_sd()
|
| /u-boot/board/freescale/ls2080aqds/ |
| A D | ls2080aqds.c | 187 u8 reg5; in config_board_mux() local
189 reg5 = QIXIS_READ(brdcfg[5]); in config_board_mux()
193 reg5 = SET_SDHC_MUX_SEL(reg5, PIN_MUX_SEL_SDHC); in config_board_mux()
196 reg5 = SET_SDHC_MUX_SEL(reg5, PIN_MUX_SEL_DSPI); in config_board_mux()
203 QIXIS_WRITE(brdcfg[5], reg5); in config_board_mux()
|
| /u-boot/board/freescale/ls2080ardb/ |
| A D | ls2080ardb.c | 238 u8 reg5; in config_board_mux() local
240 reg5 = QIXIS_READ(brdcfg[5]); in config_board_mux()
244 reg5 = SET_SDHC_MUX_SEL(reg5, PIN_MUX_SEL_SDHC); in config_board_mux()
247 reg5 = SET_SDHC_MUX_SEL(reg5, PIN_MUX_SEL_DSPI); in config_board_mux()
254 QIXIS_WRITE(brdcfg[5], reg5); in config_board_mux()
|
| /u-boot/board/freescale/p2041rdb/ |
| A D | cpld.c | 51 u8 reg5 = CPLD_READ(sw_ctl_on); in __cpld_set_altbank() local
53 CPLD_WRITE(sw_ctl_on, reg5 | CPLD_SWITCH_BANK_ENABLE); in __cpld_set_altbank()
|
| /u-boot/board/freescale/lx2160a/ |
| A D | lx2160a.c | 430 u8 reg11, reg5, reg13; in config_board_mux() local
447 reg5 = QIXIS_READ(brdcfg[5]); in config_board_mux()
448 reg5 = CFG_MUX_I2C_SDHC(reg5, 0x40); in config_board_mux()
449 QIXIS_WRITE(brdcfg[5], reg5); in config_board_mux()
|
| /u-boot/arch/arm/lib/ |
| A D | memcpy.S | 24 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
25 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
36 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
37 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
|
Completed in 18 milliseconds