Home
last modified time | relevance | path

Searched refs:reg_off (Results 1 – 9 of 9) sorted by relevance

/u-boot/drivers/clk/meson/
A Daxg.c182 regmap_read(priv->map, psdm->reg_off, &reg); in meson_mpll_get_rate()
185 regmap_read(priv->map, pn2->reg_off, &reg); in meson_mpll_get_rate()
226 regmap_read(priv->map, pn->reg_off, &reg); in meson_pll_get_rate()
229 regmap_read(priv->map, pm->reg_off, &reg); in meson_pll_get_rate()
232 regmap_read(priv->map, pod->reg_off, &reg); in meson_pll_get_rate()
A Dg12a.c269 regmap_read(priv->map, parm->reg_off, &reg); in meson_div_get_rate()
363 regmap_update_bits(priv->map, parm->reg_off, in meson_div_set_rate()
476 regmap_read(priv->map, parm->reg_off, &reg); in meson_mux_get_parent()
548 regmap_update_bits(priv->map, parm->reg_off, in meson_mux_set_parent()
667 regmap_read(priv->map, pn2->reg_off, &reg); in meson_mpll_get_rate()
716 regmap_read(priv->map, pn->reg_off, &reg); in meson_pll_get_rate()
719 regmap_read(priv->map, pm->reg_off, &reg); in meson_pll_get_rate()
722 regmap_read(priv->map, pod->reg_off, &reg); in meson_pll_get_rate()
763 regmap_read(priv->map, pn->reg_off, &reg); in meson_pcie_pll_get_rate()
766 regmap_read(priv->map, pm->reg_off, &reg); in meson_pcie_pll_get_rate()
[all …]
A Dgxbb.c300 regmap_read(priv->map, parm->reg_off, &reg); in meson_div_get_rate()
390 regmap_update_bits(priv->map, parm->reg_off, SETPMASK(parm->width, parm->shift), in meson_div_set_rate()
483 regmap_read(priv->map, parm->reg_off, &reg); in meson_mux_get_parent()
551 regmap_update_bits(priv->map, parm->reg_off, SETPMASK(parm->width, parm->shift), in meson_mux_set_parent()
670 regmap_read(priv->map, psdm->reg_off, &reg); in meson_mpll_get_rate()
673 regmap_read(priv->map, pn2->reg_off, &reg); in meson_mpll_get_rate()
714 regmap_read(priv->map, pn->reg_off, &reg); in meson_pll_get_rate()
717 regmap_read(priv->map, pm->reg_off, &reg); in meson_pll_get_rate()
720 regmap_read(priv->map, pod->reg_off, &reg); in meson_pll_get_rate()
A Dclk_meson.h28 u16 reg_off; member
/u-boot/arch/arm/mach-mvebu/serdes/a38x/
A Dctrl_pex.c288 u32 pex_config_read(u32 pex_if, u32 bus, u32 dev, u32 func, u32 reg_off) in pex_config_read() argument
329 pex_data |= (reg_off & PXCAR_REG_NUM_MASK); in pex_config_read()
331 pex_data |= (((reg_off & PXCAR_REAL_EXT_REG_NUM_MASK) >> in pex_config_read()
A Dctrl_pex.h84 u32 pex_config_read(u32 pex_if, u32 bus, u32 dev, u32 func, u32 reg_off);
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dliodn.c33 unsigned long reg_off = tbl[i].reg_offset[0]; in set_srio_liodn() local
34 out_be32((u32 *)reg_off, tbl[i].id[0]); in set_srio_liodn()
37 reg_off = tbl[i].reg_offset[1]; in set_srio_liodn()
38 out_be32((u32 *)reg_off, tbl[i].id[1]); in set_srio_liodn()
/u-boot/drivers/net/
A Dcortina_ni.c117 mdio_oper.reg_off = offset; in ca_mdio_write()
181 mdio_oper.reg_off = offset; in ca_mdio_read()
411 u32 reg_off, value; in ca_internal_gphy_cal() local
416 reg_off = priv->gphy_values[i].reg_off + (port * 0x80); in ca_internal_gphy_cal()
418 ca_reg_write(&value, reg_off, 0); in ca_internal_gphy_cal()
1071 &priv->gphy_values[i].reg_off); in ca_ni_of_to_plat()
A Dcortina_ni.h42 u32 reg_off; member
102 u32 reg_off : 5; /* bits 6:2 */ member

Completed in 18 milliseconds