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Searched refs:reg_set16 (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/phy/marvell/
A Dcomphy_a3700.c192 reg_set16(phy_addr(PCIE, PWR_MGM_TIM1), 0x10C, 0xFFFF); in comphy_pcie_power_up()
202 reg_set16(phy_addr(PCIE, MISC_REG0), in comphy_pcie_power_up()
216 reg_set16(phy_addr(PCIE, PWR_PLL_CTRL), 0xFC63, 0xFFFF); in comphy_pcie_power_up()
219 reg_set16(phy_addr(PCIE, PWR_PLL_CTRL), 0xFC62, 0xFFFF); in comphy_pcie_power_up()
232 reg_set16(phy_addr(PCIE, SYNC_PATTERN), phy_txd_inv, 0); in comphy_pcie_power_up()
240 reg_set16(phy_addr(PCIE, GLOB_PHY_CTRL0), in comphy_pcie_power_up()
363 reg_set16(phy_addr(USB3, reg), data, mask); in usb3_reg_set16()
698 reg_set16(sgmiiphy_addr(lane, addr), val, 0xFFFF); in comphy_sgmii_phy_init()
763 reg_set16(sgmiiphy_addr(lane, PWR_PLL_CTRL), in comphy_sgmii_power_up()
777 reg_set16(sgmiiphy_addr(lane, PWR_PLL_CTRL), in comphy_sgmii_power_up()
[all …]
A Dcomphy_core.h125 static inline void reg_set16(void __iomem *addr, u16 data, u16 mask) in reg_set16() function

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