| /u-boot/drivers/i2c/ |
| A D | mxc_i2c.c | 192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
213 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
217 (I2SR << reg_shift)); in wait_for_sr_state()
220 (I2SR << reg_shift)); in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
319 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
[all …]
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| A D | ocores_i2c.c | 65 u32 reg_shift; member
89 writeb(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_8()
94 writew(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_16()
99 writel(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_32()
104 out_be16(i2c->base + (reg << i2c->reg_shift), value); in oc_setreg_16be()
114 return readb(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_8()
119 return readw(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_16()
124 return readl(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_32()
129 return in_be16(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_16be()
134 return in_be32(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_32be()
[all …]
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| /u-boot/drivers/net/ |
| A D | dwmac_socfpga.c | 25 u32 reg_shift; member
62 pdata->reg_shift = args.args[1]; in dwmac_socfpga_of_to_plat()
70 u32 modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << pdata->reg_shift; in dwmac_socfpga_do_setphy()
80 modereg << pdata->reg_shift); in dwmac_socfpga_do_setphy()
87 modereg << pdata->reg_shift); in dwmac_socfpga_do_setphy()
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| /u-boot/arch/arm/mach-lpc32xx/ |
| A D | devices.c | 47 { .base = UART3_BASE, .reg_shift = 2,
49 { .base = UART4_BASE, .reg_shift = 2,
51 { .base = UART5_BASE, .reg_shift = 2,
53 { .base = UART6_BASE, .reg_shift = 2,
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| /u-boot/drivers/serial/ |
| A D | serial_rockchip.c | 35 plat->plat.reg_shift = plat->dtplat.reg_shift; in rockchip_serial_probe()
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| A D | ns16550.c | 122 writeb(value, addr + (1 << plat->reg_shift) - 1); in serial_out_dynamic()
142 return readb(addr + (1 << plat->reg_shift) - 1); in serial_in_dynamic()
165 offset *= 1 << plat->reg_shift; in ns16550_writeb()
171 serial_out_shift(addr, plat->reg_shift, value); in ns16550_writeb()
179 offset *= 1 << plat->reg_shift; in ns16550_readb()
185 return serial_in_shift(addr, plat->reg_shift); in ns16550_readb()
479 info->reg_shift = plat->reg_shift; in ns16550_serial_getinfo()
551 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0); in ns16550_serial_of_to_plat()
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| A D | serial_intel_mid.c | 28 offset *= 1 << plat->reg_shift; in mid_writel()
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| A D | serial_coreboot.c | 20 plat->reg_shift = cb_info->regwidth == 4 ? 2 : 0; in coreboot_of_to_plat()
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| A D | serial_omap.c | 117 plat->reg_shift = 2; in omap_serial_of_to_plat()
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| A D | sandbox.c | 174 .reg_shift = 0, in sandbox_serial_getinfo()
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| /u-boot/arch/arm/mach-omap2/am33xx/ |
| A D | board.c | 85 { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2,
88 { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2,
91 { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2,
93 { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2,
95 { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2,
97 { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2,
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| /u-boot/drivers/gpio/ |
| A D | hsdk-creg-gpio.c | 34 u8 reg_shift = oft * hcg->bit_per_gpio + hcg->shift; in hsdk_creg_gpio_set_value() local
37 reg &= ~(GENMASK(hcg->bit_per_gpio - 1, 0) << reg_shift); in hsdk_creg_gpio_set_value()
38 reg |= ((val ? hcg->deactivate : hcg->activate) << reg_shift); in hsdk_creg_gpio_set_value()
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| /u-boot/arch/x86/cpu/apollolake/ |
| A D | uart.c | 109 ns.reg_shift = dtplat->reg_shift; in apl_ns16550_of_to_plat()
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| /u-boot/arch/x86/cpu/slimbootloader/ |
| A D | serial.c | 41 plat->reg_shift = data->stride >> 1; in slimbootloader_serial_of_to_plat()
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| /u-boot/board/timll/devkit8000/ |
| A D | devkit8000.c | 53 .reg_shift = 2,
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| /u-boot/board/lg/sniper/ |
| A D | sniper.c | 36 .reg_shift = 2,
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| /u-boot/arch/arm/mach-tegra/ |
| A D | board.c | 263 .reg_shift = 2,
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| /u-boot/include/ |
| A D | ns16550.h | 76 int reg_shift; member
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| A D | serial.h | 151 u8 reg_shift; member
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| /u-boot/board/isee/igep00x0/ |
| A D | igep00x0.c | 34 .reg_shift = 2,
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| /u-boot/board/davinci/da8xxevm/ |
| A D | omapl138_lcdk.c | 362 .reg_shift = 2,
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| /u-boot/arch/x86/lib/ |
| A D | acpi_table.c | 399 serial_offset = serial_info.reg_offset << serial_info.reg_shift; in acpi_create_spcr()
403 switch (serial_info.reg_shift) { in acpi_create_spcr()
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| /u-boot/drivers/video/exynos/ |
| A D | exynos_dp_lowlevel.c | 924 unsigned int reg_shift[DP_LANE_CNT_4] = { in exynos_dp_set_lane_pre_emphasis() local
932 reg = level << reg_shift[i]; in exynos_dp_set_lane_pre_emphasis()
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