| /u-boot/drivers/ata/ |
| A D | sata_mv.c | 264 u32 regbase; member
332 out_le32(priv->regbase + EDMA_IECR, 0x0); in mv_start_edma_engine()
339 tmp = in_le32(priv->regbase + EDMA_CFG); in mv_start_edma_engine()
342 out_le32(priv->regbase + EDMA_CFG, tmp); in mv_start_edma_engine()
352 out_le32(priv->regbase + EDMA_RQOPR, 0x0); in mv_start_edma_engine()
357 out_le32(priv->regbase + EDMA_RSIPR, 0x0); in mv_start_edma_engine()
374 out_le32(priv->regbase + EDMA_CMD, 0); in mv_reset_channel()
386 out_le32(priv->regbase + EDMA_CMD, 0x0); in mv_reset_port()
388 out_le32(priv->regbase + EDMA_IECR, 0x0); in mv_reset_port()
389 out_le32(priv->regbase + EDMA_IEMR, 0x0); in mv_reset_port()
[all …]
|
| /u-boot/drivers/spi/ |
| A D | cadence_qspi_apb.c | 387 reg = readl(plat->regbase + CQSPI_REG_SIZE); in cadence_qspi_apb_controller_init()
393 writel(reg, plat->regbase + CQSPI_REG_SIZE); in cadence_qspi_apb_controller_init()
396 writel(0, plat->regbase + CQSPI_REG_REMAP); in cadence_qspi_apb_controller_init()
402 writel(0, plat->regbase + CQSPI_REG_IRQMASK); in cadence_qspi_apb_controller_init()
568 reg = readl(plat->regbase + CQSPI_REG_SIZE); in cadence_qspi_apb_read_setup()
571 writel(reg, plat->regbase + CQSPI_REG_SIZE); in cadence_qspi_apb_read_setup()
609 plat->regbase + CQSPI_REG_INDIRECTRD); in cadence_qspi_apb_indirect_read_execute()
672 if (!cadence_qspi_wait_idle(plat->regbase)) in cadence_qspi_apb_read_execute()
696 reg = readl(plat->regbase + CQSPI_REG_SIZE); in cadence_qspi_apb_write_setup()
699 writel(reg, plat->regbase + CQSPI_REG_SIZE); in cadence_qspi_apb_write_setup()
[all …]
|
| A D | cadence_qspi.c | 33 cadence_qspi_apb_config_baudrate_div(priv->regbase, in cadence_spi_write_speed()
37 cadence_qspi_apb_delay(priv->regbase, plat->ref_clk_hz, hz, in cadence_spi_write_speed()
58 void *base = priv->regbase; in spi_calibration()
141 cadence_qspi_apb_controller_disable(priv->regbase); in cadence_spi_set_speed()
159 cadence_qspi_apb_controller_enable(priv->regbase); in cadence_spi_set_speed()
173 priv->regbase = plat->regbase; in cadence_spi_probe()
219 cadence_qspi_apb_controller_disable(priv->regbase); in cadence_spi_set_mode()
222 cadence_qspi_apb_set_clk_mode(priv->regbase, mode); in cadence_spi_set_mode()
226 cadence_qspi_apb_dac_mode_enable(priv->regbase); in cadence_spi_set_mode()
229 cadence_qspi_apb_controller_enable(priv->regbase); in cadence_spi_set_mode()
[all …]
|
| A D | cadence_qspi.h | 21 void *regbase; member
40 void *regbase; member
|
| /u-boot/drivers/mmc/ |
| A D | tmio-common.c | 30 return readq(priv->regbase + (reg << 1)); in tmio_sd_readq()
36 writeq(val, priv->regbase + (reg << 1)); in tmio_sd_writeq()
41 return readw(priv->regbase + (reg >> 1)); in tmio_sd_readw()
47 writew(val, priv->regbase + (reg >> 1)); in tmio_sd_writew()
55 return readl(priv->regbase + (reg << 1)); in tmio_sd_readl()
57 val = readw(priv->regbase + (reg >> 1)) & 0xffff; in tmio_sd_readl()
64 return readl(priv->regbase + reg); in tmio_sd_readl()
71 writel(val, priv->regbase + (reg << 1)); in tmio_sd_writel()
73 writew(val & 0xffff, priv->regbase + (reg >> 1)); in tmio_sd_writel()
79 writel(val, priv->regbase + reg); in tmio_sd_writel()
[all …]
|
| A D | mv_sdhci.c | 72 int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks) in mv_sdh_init() argument
82 host->ioaddr = (void *)regbase; in mv_sdh_init()
93 sdhci_mvebu_mbus_config((void __iomem *)regbase); in mv_sdh_init()
|
| A D | atmel_sdhci.c | 19 int atmel_sdhci_init(void *regbase, u32 id) in atmel_sdhci_init() argument
31 host->ioaddr = regbase; in atmel_sdhci_init()
|
| A D | meson_gx_mmc.h | 90 void *regbase; member
|
| A D | s5p_sdhci.c | 109 int s5p_sdhci_init(u32 regbase, int index, int bus_width) in s5p_sdhci_init() argument
116 host->ioaddr = (void *)regbase; in s5p_sdhci_init()
|
| A D | meson_gx_mmc.c | 32 return pdata->regbase; in get_regbase()
253 pdata->regbase = (void *)addr; in meson_mmc_of_to_plat()
|
| A D | tmio-common.h | 121 void __iomem *regbase; member
|
| A D | renesas-sdhi.c | 112 return (uintptr_t)(priv->regbase) == 0xee140000; in rmobile_is_gen3_mmc0()
|
| /u-boot/arch/arm/include/asm/arch-hi6220/ |
| A D | dwmmc.h | 7 int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width);
|
| /u-boot/arch/arm/mach-bcmstb/include/mach/ |
| A D | sdhci.h | 13 int bcmstb_sdhci_init(phys_addr_t regbase);
|
| /u-boot/arch/arm/mach-at91/include/mach/ |
| A D | atmel_sdhci.h | 10 int atmel_sdhci_init(void *regbase, u32 id);
|
| /u-boot/arch/arm/mach-bcm283x/include/mach/ |
| A D | sdhci.h | 14 int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);
|
| /u-boot/drivers/mtd/nand/raw/ |
| A D | vf610_nfc.c | 245 static inline void vf610_nfc_clear_status(void __iomem *regbase) in vf610_nfc_clear_status() argument
247 void __iomem *reg = regbase + NFC_IRQ_STATUS; in vf610_nfc_clear_status()
300 static void vf610_nfc_send_command(void __iomem *regbase, u32 cmd_byte1, in vf610_nfc_send_command() argument
303 void __iomem *reg = regbase + NFC_FLASH_CMD2; in vf610_nfc_send_command()
305 vf610_nfc_clear_status(regbase); in vf610_nfc_send_command()
315 static void vf610_nfc_send_commands(void __iomem *regbase, u32 cmd_byte1, in vf610_nfc_send_commands() argument
318 void __iomem *reg = regbase + NFC_FLASH_CMD1; in vf610_nfc_send_commands()
320 vf610_nfc_send_command(regbase, cmd_byte1, cmd_code); in vf610_nfc_send_commands()
349 static inline void vf610_nfc_transfer_size(void __iomem *regbase, int size) in vf610_nfc_transfer_size() argument
351 __raw_writel(size, regbase + NFC_SECTOR_SIZE); in vf610_nfc_transfer_size()
|
| /u-boot/drivers/ram/sifive/ |
| A D | fu540_ddr.c | 152 static void fu540_ddr_check_errata(u32 regbase, u32 updownreg) in fu540_ddr_check_errata() argument
211 u32 regbase = slicebase + 34; in fu540_ddr_phy_fixup() local
214 u32 updownreg = readl(regbase + reg + ddrphyreg); in fu540_ddr_phy_fixup()
216 fu540_ddr_check_errata(regbase, updownreg); in fu540_ddr_phy_fixup()
|
| /u-boot/arch/arm/mach-s5pc1xx/include/mach/ |
| A D | mmc.h | 55 int s5p_sdhci_init(u32 regbase, int index, int bus_width);
|
| /u-boot/arch/arm/mach-exynos/include/mach/ |
| A D | mmc.h | 57 int s5p_sdhci_init(u32 regbase, int index, int bus_width);
|
| /u-boot/arch/arm/mach-mvebu/include/mach/ |
| A D | cpu.h | 148 int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
|