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Searched refs:rfshtmg (Results 1 – 25 of 25) sorted by relevance

/u-boot/board/compulab/cl-som-imx7/
A Dspl.c93 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; in cl_som_imx7_spl_dram_cfg_size()
104 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; in cl_som_imx7_spl_dram_cfg_size()
115 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; in cl_som_imx7_spl_dram_cfg_size()
126 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x0040005E; in cl_som_imx7_spl_dram_cfg_size()
/u-boot/board/technexion/pico-imx7d/
A Dspl.c37 .rfshtmg = 0x00400046,
60 .rfshtmg = 0x00400046,
/u-boot/arch/arm/mach-sunxi/dram_timings/
A Dh616_ddr3_1333.c93 writel((trefi << 16) | trfc, &mctl_ctl->rfshtmg); in mctl_set_timing_params()
A Dddr3_1333.c86 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
A Dlpddr3_stock.c82 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
A Dddr2_v3s.c83 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
A Dh6_lpddr3.c131 writel((trefi << 16) | trfc, &mctl_ctl->rfshtmg); in mctl_set_timing_params()
A Dh6_ddr3_1333.c143 writel((trefi << 16) | trfc, &mctl_ctl->rfshtmg); in mctl_set_timing_params()
/u-boot/arch/arm/mach-imx/mx7/
A Dddr.c61 writel(ddrc_regs_val->rfshtmg, &ddrc_regs->rfshtmg); in mx7_dram_cfg()
/u-boot/arch/arm/include/asm/arch-mx7/
A Dmx7-ddr.h21 u32 rfshtmg; /* 0x0064 */ member
/u-boot/arch/arm/include/asm/arch-sunxi/
A Ddram_sun50i_h616.h80 u32 rfshtmg; /* 0x064 */ member
A Ddram_sun8i_a33.h102 u32 rfshtmg; /* 0x90 */ member
A Ddram_sunxi_dw.h98 u32 rfshtmg; /* 0x90 refresh timing */ member
A Ddram_sun8i_a83t.h102 u32 rfshtmg; /* 0x90 */ member
A Ddram_sun9i.h61 u32 rfshtmg; /* 0x64 refresh timing register */ member
A Ddram_sun50i_h6.h95 u32 rfshtmg; /* 0x064 */ member
A Ddram_sun8i_a23.h109 u32 rfshtmg; /* 0x64 */ member
/u-boot/drivers/ram/stm32mp1/
A Dstm32mp1_ddr.h70 u32 rfshtmg; member
A Dstm32mp1_ddr_regs.h31 u32 rfshtmg; /* 0x64 Refresh Timing*/ member
A Dstm32mp1_ddr.c104 DDRCTL_REG_TIMING(rfshtmg),
/u-boot/arch/arm/mach-sunxi/
A Ddram_sun8i_a23.c210 &mctl_ctl->rfshtmg); in mctl_init()
A Ddram_sun8i_a33.c169 writel(reg_val, &mctl_ctl->rfshtmg); in auto_set_timing_para()
A Ddram_sun8i_a83t.c201 writel(reg_val, &mctl_ctl->rfshtmg); in auto_set_timing_para()
A Ddram_sun9i.c572 &mctl_ctl->rfshtmg); in mctl_channel_init()
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dddr.h25 u32 rfshtmg; member
92 u32 rfshtmg; member

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