Searched refs:rfshtmg (Results 1 – 25 of 25) sorted by relevance
/u-boot/board/compulab/cl-som-imx7/ |
A D | spl.c | 93 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; in cl_som_imx7_spl_dram_cfg_size() 104 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; in cl_som_imx7_spl_dram_cfg_size() 115 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; in cl_som_imx7_spl_dram_cfg_size() 126 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x0040005E; in cl_som_imx7_spl_dram_cfg_size()
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/u-boot/board/technexion/pico-imx7d/ |
A D | spl.c | 37 .rfshtmg = 0x00400046, 60 .rfshtmg = 0x00400046,
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/u-boot/arch/arm/mach-sunxi/dram_timings/ |
A D | h616_ddr3_1333.c | 93 writel((trefi << 16) | trfc, &mctl_ctl->rfshtmg); in mctl_set_timing_params()
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A D | ddr3_1333.c | 86 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
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A D | lpddr3_stock.c | 82 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
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A D | ddr2_v3s.c | 83 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
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A D | h6_lpddr3.c | 131 writel((trefi << 16) | trfc, &mctl_ctl->rfshtmg); in mctl_set_timing_params()
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A D | h6_ddr3_1333.c | 143 writel((trefi << 16) | trfc, &mctl_ctl->rfshtmg); in mctl_set_timing_params()
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/u-boot/arch/arm/mach-imx/mx7/ |
A D | ddr.c | 61 writel(ddrc_regs_val->rfshtmg, &ddrc_regs->rfshtmg); in mx7_dram_cfg()
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/u-boot/arch/arm/include/asm/arch-mx7/ |
A D | mx7-ddr.h | 21 u32 rfshtmg; /* 0x0064 */ member
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/u-boot/arch/arm/include/asm/arch-sunxi/ |
A D | dram_sun50i_h616.h | 80 u32 rfshtmg; /* 0x064 */ member
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A D | dram_sun8i_a33.h | 102 u32 rfshtmg; /* 0x90 */ member
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A D | dram_sunxi_dw.h | 98 u32 rfshtmg; /* 0x90 refresh timing */ member
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A D | dram_sun8i_a83t.h | 102 u32 rfshtmg; /* 0x90 */ member
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A D | dram_sun9i.h | 61 u32 rfshtmg; /* 0x64 refresh timing register */ member
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A D | dram_sun50i_h6.h | 95 u32 rfshtmg; /* 0x064 */ member
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A D | dram_sun8i_a23.h | 109 u32 rfshtmg; /* 0x64 */ member
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/u-boot/drivers/ram/stm32mp1/ |
A D | stm32mp1_ddr.h | 70 u32 rfshtmg; member
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A D | stm32mp1_ddr_regs.h | 31 u32 rfshtmg; /* 0x64 Refresh Timing*/ member
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A D | stm32mp1_ddr.c | 104 DDRCTL_REG_TIMING(rfshtmg),
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/u-boot/arch/arm/mach-sunxi/ |
A D | dram_sun8i_a23.c | 210 &mctl_ctl->rfshtmg); in mctl_init()
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A D | dram_sun8i_a33.c | 169 writel(reg_val, &mctl_ctl->rfshtmg); in auto_set_timing_para()
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A D | dram_sun8i_a83t.c | 201 writel(reg_val, &mctl_ctl->rfshtmg); in auto_set_timing_para()
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A D | dram_sun9i.c | 572 &mctl_ctl->rfshtmg); in mctl_channel_init()
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/u-boot/arch/arm/include/asm/arch-imx8m/ |
A D | ddr.h | 25 u32 rfshtmg; member 92 u32 rfshtmg; member
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