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Searched refs:rk_clrsetreg (Results 1 – 25 of 38) sorted by relevance

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/u-boot/arch/arm/mach-rockchip/px30/
A Dpx30.c184 rk_clrsetreg(&grf->gpio1dl_iomux, in arch_cpu_init()
188 rk_clrsetreg(&grf->gpio1dh_iomux, in arch_cpu_init()
231 rk_clrsetreg(&grf->gpio1cl_iomux, in board_debug_uart_init()
253 rk_clrsetreg(&grf->iofunc_con0, in board_debug_uart_init()
257 rk_clrsetreg(&grf->gpio1bh_iomux, in board_debug_uart_init()
262 rk_clrsetreg(&grf->iofunc_con0, in board_debug_uart_init()
281 rk_clrsetreg(&grf->gpio3al_iomux, in board_debug_uart_init()
305 rk_clrsetreg(&grf->iofunc_con0, in board_debug_uart_init()
309 rk_clrsetreg(&grf->gpio2bh_iomux, in board_debug_uart_init()
314 rk_clrsetreg(&grf->iofunc_con0, in board_debug_uart_init()
[all …]
/u-boot/arch/arm/mach-rockchip/rk3368/
A Drk3368.c71 rk_clrsetreg(&grf->soc_con14, MCU_SRAM_BASE_BIT31_BIT28_MASK, in mcu_init()
73 rk_clrsetreg(&grf->soc_con11, MCU_SRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
75 rk_clrsetreg(&grf->soc_con14, MCU_EXSRAM_BASE_BIT31_BIT28_MASK, in mcu_init()
77 rk_clrsetreg(&grf->soc_con12, MCU_EXSRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
79 rk_clrsetreg(&grf->soc_con14, MCU_EXPERI_BASE_BIT31_BIT28_MASK, in mcu_init()
81 rk_clrsetreg(&grf->soc_con13, MCU_EXPERI_BASE_BIT27_BIT12_MASK, in mcu_init()
195 rk_clrsetreg(&grf->gpio2d_iomux, in board_debug_uart_init()
197 rk_clrsetreg(&grf->gpio2d_iomux, in board_debug_uart_init()
215 rk_clrsetreg(&pmugrf->gpio0d_iomux, in board_debug_uart_init()
235 rk_clrsetreg(&grf->gpio2a_iomux, in board_debug_uart_init()
[all …]
/u-boot/arch/arm/mach-rockchip/rk3188/
A Drk3188.c46 rk_clrsetreg(&grf->gpio1b_iomux, in board_debug_uart_init()
65 rk_clrsetreg(&grf->uoc0_con[0], in arch_cpu_init()
69 rk_clrsetreg(&grf->uoc0_con[2], in arch_cpu_init()
71 rk_clrsetreg(&grf->uoc0_con[3], in arch_cpu_init()
78 rk_clrsetreg(&grf->uoc0_con[0], in arch_cpu_init()
102 rk_clrsetreg(&grf->soc_con0, in rk_board_late_init()
/u-boot/arch/arm/mach-rockchip/rk3399/
A Drk3399.c103 rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0); in arch_cpu_init()
128 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
131 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
136 rk_clrsetreg(&grf->gpio3b_iomux, in board_debug_uart_init()
139 rk_clrsetreg(&grf->gpio3b_iomux, in board_debug_uart_init()
158 rk_clrsetreg(&grf->gpio4c_iomux, in board_debug_uart_init()
161 rk_clrsetreg(&grf->gpio4c_iomux, in board_debug_uart_init()
165 rk_clrsetreg(&grf->soc_con7, in board_debug_uart_init()
/u-boot/drivers/net/
A Dgmac_rockchip.c341 rk_clrsetreg(&grf->gmac_con0, in rv1108_set_rmii_speed()
359 rk_clrsetreg(&grf->mac_con1, in px30_gmac_set_to_rmii()
392 rk_clrsetreg(&grf->mac_con[1], in rk3228_gmac_set_to_rgmii()
412 rk_clrsetreg(&grf->soc_con1, in rk3288_gmac_set_to_rgmii()
416 rk_clrsetreg(&grf->soc_con3, in rk3288_gmac_set_to_rgmii()
437 rk_clrsetreg(&grf->mac_con0, in rk3308_gmac_set_to_rmii()
508 rk_clrsetreg(&grf->soc_con15, in rk3368_gmac_set_to_rgmii()
512 rk_clrsetreg(&grf->soc_con16, in rk3368_gmac_set_to_rgmii()
528 rk_clrsetreg(&grf->soc_con5, in rk3399_gmac_set_to_rgmii()
532 rk_clrsetreg(&grf->soc_con6, in rk3399_gmac_set_to_rgmii()
[all …]
/u-boot/drivers/clk/rockchip/
A Dclk_rk322x.c68 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
92 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
112 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
117 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
135 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
140 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
160 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
169 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
304 rk_clrsetreg(&cru->cru_clksel_con[11], in rockchip_mmc_set_clk()
307 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
[all …]
A Dclk_rv1108.c213 rk_clrsetreg(&cru->clksel_con[22], in rv1108_saradc_set_clk()
238 rk_clrsetreg(&cru->clksel_con[28], in rv1108_aclk_vio1_set_clk()
264 rk_clrsetreg(&cru->clksel_con[28], in rv1108_aclk_vio0_set_clk()
270 rk_clrsetreg(&cru->clksel_con[29], in rv1108_aclk_vio0_set_clk()
274 rk_clrsetreg(&cru->clksel_con[29], in rv1108_aclk_vio0_set_clk()
299 rk_clrsetreg(&cru->clksel_con[32], in rv1108_dclk_vop_set_clk()
329 rk_clrsetreg(&cru->clksel_con[2], in rv1108_aclk_bus_set_clk()
381 rk_clrsetreg(&cru->clksel_con[23], in rv1108_aclk_peri_set_clk()
397 rk_clrsetreg(&cru->clksel_con[23], in rv1108_hclk_peri_set_clk()
412 rk_clrsetreg(&cru->clksel_con[23], in rv1108_pclk_peri_set_clk()
[all …]
A Dclk_rk3288.c435 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
464 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
487 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
496 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
520 rk_clrsetreg(&cru->cru_clksel_con[0], in rk3288_clk_configure_cpu()
531 rk_clrsetreg(&cru->cru_clksel_con[37], in rk3288_clk_configure_cpu()
635 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
642 rk_clrsetreg(&cru->cru_clksel_con[11], in rockchip_mmc_set_clk()
649 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
701 rk_clrsetreg(&cru->cru_clksel_con[25], in rockchip_spi_set_clk()
[all …]
A Dclk_rk3188.c108 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
213 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_configure_cpu()
218 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_configure_cpu()
305 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
311 rk_clrsetreg(&cru->cru_clksel_con[11], in rockchip_mmc_set_clk()
317 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
383 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
407 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
420 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
443 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
[all …]
A Dclk_rk3328.c267 rk_clrsetreg(&pll_con[0], in rkclk_set_pll()
271 rk_clrsetreg(&pll_con[1], in rkclk_set_pll()
301 rk_clrsetreg(&cru->clksel_con[28], in rkclk_init()
305 rk_clrsetreg(&cru->clksel_con[29], in rkclk_init()
324 rk_clrsetreg(&cru->clksel_con[0], in rk3328_configure_cpu()
329 rk_clrsetreg(&cru->clksel_con[1], in rk3328_configure_cpu()
374 rk_clrsetreg(&cru->clksel_con[34], in rk3328_i2c_set_clk()
381 rk_clrsetreg(&cru->clksel_con[34], in rk3328_i2c_set_clk()
526 rk_clrsetreg(&cru->clksel_con[24], in rk3328_pwm_set_clk()
552 rk_clrsetreg(&cru->clksel_con[23], in rk3328_saradc_set_clk()
[all …]
A Dclk_rk3036.c69 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
72 rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkclk_set_pll()
90 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
110 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
115 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
133 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
138 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
158 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
167 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
265 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
[all …]
A Dclk_rk3128.c63 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
151 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
171 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
176 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
194 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
199 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
219 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
228 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
235 rk_clrsetreg(&cru->cru_clksel_con[2], in rkclk_init()
331 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
[all …]
A Dclk_px30.c241 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
329 rk_clrsetreg(&cru->clksel_con[49], in px30_i2c_set_clk()
336 rk_clrsetreg(&cru->clksel_con[49], in px30_i2c_set_clk()
343 rk_clrsetreg(&cru->clksel_con[50], in px30_i2c_set_clk()
350 rk_clrsetreg(&cru->clksel_con[50], in px30_i2c_set_clk()
502 rk_clrsetreg(&cru->clksel_con[15], in px30_nandc_set_clk()
656 rk_clrsetreg(&cru->clksel_con[55], in px30_saradc_set_clk()
682 rk_clrsetreg(&cru->clksel_con[54], in px30_tsadc_set_clk()
782 rk_clrsetreg(&cru->clksel_con[3], in px30_vop_set_clk()
798 rk_clrsetreg(&cru->clksel_con[5], in px30_vop_set_clk()
[all …]
A Dclk_rk3399.c352 rk_clrsetreg(&pll_con[1], in rkclk_set_pll()
454 rk_clrsetreg(&cru->clksel_con[0], in rk3399_configure_cpu_l()
461 rk_clrsetreg(&cru->clksel_con[1], in rk3399_configure_cpu_l()
489 rk_clrsetreg(&cru->clksel_con[2], in rk3399_configure_cpu_b()
496 rk_clrsetreg(&cru->clksel_con[3], in rk3399_configure_cpu_b()
705 rk_clrsetreg(aclkreg_addr, in rk3399_vop_set_clk()
716 rk_clrsetreg(dclkreg_addr, in rk3399_vop_set_clk()
906 rk_clrsetreg(&cru->clksel_con[26], in rk3399_saradc_set_clk()
1332 rk_clrsetreg(&cru->clksel_con[14], in rkclk_init()
1352 rk_clrsetreg(&cru->clksel_con[23], in rkclk_init()
[all …]
A Dclk_rk3308.c92 rk_clrsetreg(&cru->clksel_con[0], in rk3308_armclk_set_clk()
100 rk_clrsetreg(&cru->clksel_con[0], in rk3308_armclk_set_clk()
331 rk_clrsetreg(&cru->clksel_con[34], in rk3308_saradc_set_clk()
359 rk_clrsetreg(&cru->clksel_con[33], in rk3308_tsadc_set_clk()
446 rk_clrsetreg(&cru->clksel_con[29], in rk3308_pwm_set_clk()
527 rk_clrsetreg(&cru->clksel_con[8], in rk3308_vop_set_clk()
531 rk_clrsetreg(&cru->clksel_con[8], in rk3308_vop_set_clk()
586 rk_clrsetreg(&cru->clksel_con[5], in rk3308_bus_set_clk()
592 rk_clrsetreg(&cru->clksel_con[6], in rk3308_bus_set_clk()
597 rk_clrsetreg(&cru->clksel_con[6], in rk3308_bus_set_clk()
[all …]
A Dclk_pll.c204 rk_clrsetreg(base + pll->mode_offset, in rk3036_pll_set_rate()
212 rk_clrsetreg(base + pll->con_offset, in rk3036_pll_set_rate()
217 rk_clrsetreg(base + pll->con_offset + 0x4, in rk3036_pll_set_rate()
223 rk_clrsetreg(base + pll->con_offset + 0x4, in rk3036_pll_set_rate()
240 rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift, in rk3036_pll_set_rate()
/u-boot/arch/arm/mach-rockchip/rk322x/
A Drk322x.c42 rk_clrsetreg(&grf->gpio1b_iomux, in board_debug_uart_init()
47 rk_clrsetreg(&grf->con_iomux, in board_debug_uart_init()
68 rk_clrsetreg(&grf->macphy_con[0], in arch_cpu_init()
/u-boot/arch/arm/mach-rockchip/rk3308/
A Drk3308.c165 rk_clrsetreg(&grf->soc_con0, IOVSEL3_CTRL_MASK | IOVSEL3_MASK, val); in rk_board_init()
177 rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK, in board_debug_uart_init()
179 rk_clrsetreg(&grf->gpio4d_iomux, in board_debug_uart_init()
199 rk_clrsetreg(&grf->soc_con13, in arch_cpu_init()
207 rk_clrsetreg(&grf->soc_con15, in arch_cpu_init()
/u-boot/drivers/video/rockchip/
A Drk3288_mipi.c39 rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK, in rk_mipi_dsi_source_select()
44 rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK, in rk_mipi_dsi_source_select()
65 rk_clrsetreg(&grf->soc_con8, RK3288_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
70 rk_clrsetreg(&grf->soc_con8, in rk_mipi_dphy_mode_set()
76 rk_clrsetreg(&grf->soc_con8, in rk_mipi_dphy_mode_set()
A Drk3399_mipi.c37 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
41 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
61 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
65 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val); in rk_mipi_dphy_mode_set()
69 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val); in rk_mipi_dphy_mode_set()
/u-boot/arch/arm/mach-rockchip/rk3328/
A Drk3328.c90 rk_clrsetreg(&grf->com_iomux, in board_debug_uart_init()
93 rk_clrsetreg(&grf->gpio2a_iomux, in board_debug_uart_init()
96 rk_clrsetreg(&grf->gpio2a_iomux, in board_debug_uart_init()
/u-boot/board/firefly/firefly-rk3308/
A Droc_cc_rk3308.c57 rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK, in board_debug_uart_init()
59 rk_clrsetreg(&grf->gpio1ch_iomux, in board_debug_uart_init()
/u-boot/arch/arm/mach-rockchip/rk3036/
A Drk3036.c39 rk_clrsetreg(&grf->gpio1c_iomux, in board_debug_uart_init()
/u-boot/arch/arm/include/asm/arch-rockchip/
A Dhardware.h13 #define rk_clrsetreg(addr, clr, set) \ macro
/u-boot/board/rockchip/evb_rv1108/
A Devb_rv1108.c42 rk_clrsetreg(&grf->gpio2d_iomux, in board_early_init_f()

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