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Searched refs:scdr (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/arm/mach-at91/
A Dclock.c69 writel(sys_clk, &pmc->scdr); in at91_system_clk_disable()
/u-boot/arch/arm/mach-at91/include/mach/
A Dat91_pio.h75 u32 scdr; /* 0x8C SCLK Divider Debouncing Register */ member
A Dat91_pmc.h31 u32 scdr; /* 0x04 System Clock Disable Register */ member
/u-boot/drivers/gpio/
A Dat91_gpio.c333 writel(div & PIO_SCDR_DIV, &at91_port->mux.pio3.scdr); in at91_pio3_set_pio_debounce()
/u-boot/drivers/pinctrl/
A Dpinctrl-at91.c199 writel(div & PIO_SCDR_DIV, &pio->mux.pio3.scdr); in at91_mux_pio3_set_debounce()

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