| /u-boot/board/engicam/common/ |
| A D | spl.c | 250 .sde_to_rst = 0x10,
282 .sde_to_rst = 0x10,
299 .sde_to_rst = 0x10,
347 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /u-boot/board/bachmann/ot1200/ |
| A D | ot1200_spl.c | 84 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /u-boot/board/ccv/xpress/ |
| A D | spl.c | 60 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /u-boot/board/compulab/cm_fx6/ |
| A D | spl.c | 110 .sde_to_rst = 0x10,
177 .sde_to_rst = 0x10,
|
| /u-boot/board/barco/platinum/ |
| A D | spl_picon.c | 136 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| A D | spl_titanium.c | 139 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| /u-boot/board/wandboard/ |
| A D | spl.c | 238 .sde_to_rst = 0x10,
281 .sde_to_rst = 0x10,
300 .sde_to_rst = 0x10,
|
| /u-boot/board/freescale/mx6ul_14x14_evk/ |
| A D | mx6ul_14x14_evk.c | 417 .sde_to_rst = 0, /* LPDDR2 does not need this field */
457 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /u-boot/board/liebherr/mccmon6/ |
| A D | spl.c | 190 .sde_to_rst = 0x10,
231 .sde_to_rst = 0x10,
248 .sde_to_rst = 0x10,
|
| /u-boot/board/bticino/mamoj/ |
| A D | spl.c | 129 .sde_to_rst = 0x10,
|
| /u-boot/arch/arm/mach-imx/mx6/ |
| A D | litesom.c | 130 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| A D | opos6ul.c | 130 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /u-boot/board/technexion/pico-imx6ul/ |
| A D | spl.c | 80 .sde_to_rst = 0x10,
|
| /u-boot/board/myir/mys_6ulx/ |
| A D | spl.c | 64 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /u-boot/board/phytec/pcl063/ |
| A D | spl.c | 66 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /u-boot/board/k+p/kp_imx6q_tpc/ |
| A D | kp_imx6q_tpc_spl.c | 174 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| /u-boot/board/phytec/pcm058/ |
| A D | pcm058.c | 219 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| /u-boot/board/variscite/dart_6ul/ |
| A D | spl.c | 74 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /u-boot/board/freescale/mx6memcal/ |
| A D | spl.c | 233 .sde_to_rst = 0x10, /* JEDEC value for LPDDR2 - 200us */
238 .sde_to_rst = 0, /* LPDDR2 does not need this field */
|
| /u-boot/board/udoo/ |
| A D | udoo_spl.c | 196 .sde_to_rst = 0x10,
|
| /u-boot/board/dhelectronics/dh_imx6/ |
| A D | dh_imx6_spl.c | 252 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
271 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /u-boot/board/technexion/pico-imx6/ |
| A D | spl.c | 198 .sde_to_rst = 0x10,
|
| /u-boot/board/liebherr/display5/ |
| A D | spl.c | 260 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| /u-boot/board/freescale/mx6slevk/ |
| A D | mx6slevk.c | 355 .sde_to_rst = 0, /* LPDDR2 does not need this field */ in spl_dram_init()
|
| /u-boot/board/gateworks/gw_ventana/ |
| A D | gw_ventana_spl.c | 510 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|