| /u-boot/lib/efi_selftest/ |
| A D | efi_selftest_rtc.c | 51 .second = 53, in execute()
64 tm_old.hour, tm_old.minute, tm_old.second); in execute()
81 tm.second < tm_new.second || in execute()
82 tm.second > tm_new.second + 2) { in execute()
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| /u-boot/arch/arm/include/asm/ |
| A D | opcodes.h | 146 #define __opcode_thumb32_compose(first, second) ( \ argument
148 | ___opcode_identity32(___opcode_identity16(second)) \
152 #define ___asm_opcode_thumb32_compose(first, second) ( \ argument
154 | ___asm_opcode_identity32(___asm_opcode_identity16(second)) \
220 #define ___inst_thumb32(first, second) .short first, second argument
224 #define ___inst_thumb32(first, second) \ argument
225 ".short " __stringify(first) ", " __stringify(second) "\n\t"
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| A D | davinci_rtc.h | 17 unsigned int second; member
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| /u-boot/drivers/rtc/ |
| A D | ftrtc010.c | 58 unsigned long second; in ftrtc010_time() local
62 second = readl(&rtc->sec); in ftrtc010_time()
67 } while (second != second2); in ftrtc010_time()
69 return day * 24 * 60 * 60 + hour * 60 * 60 + minute * 60 + second; in ftrtc010_time()
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| A D | davinci.c | 28 sec = readl(&rtc->second); in rtc_get()
72 writel(bin2bcd(tmp->tm_sec), &rtc->second); in rtc_set()
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| /u-boot/arch/arm/dts/ |
| A D | kirkwood-openrd.dtsi | 61 * mode for the second UART.
66 * To use the second UART, you need to change also
78 * SelUARTorSD selects between the second UART
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| A D | armada-388.dtsi | 11 * property and the name of the SoC, and add the second SATA host which control
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| /u-boot/arch/arm/mach-bcmstb/ |
| A D | Kconfig | 8 is acting as the second stage bootloader, and U-Boot is
16 is acting as the second stage bootloader, and U-Boot is
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| /u-boot/doc/device-tree-bindings/gpio/ |
| A D | nvidia,tegra20-gpio.txt | 10 second cell is used to specify optional parameters:
15 The second cell is used to specify flags:
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| /u-boot/board/toradex/common/ |
| A D | Kconfig | 66 int "Toradex config block offset, second instance"
74 bool "Set the second Ethernet address"
78 second Ethernet address as environment variable (eth1addr).
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| /u-boot/board/vamrs/rock960_rk3399/ |
| A D | README | 123 The idbspl.img contains the first stage, and the u-boot.img the second stage.
125 (aka loader1) start sector is 64, and the second stage start sector is 16384.
128 and the second stage offset is 8 MiB.
130 Note: the second stage location is actually not as per the spec,
131 but defined by the SPL. Mainline SPL defines an 8 MiB offset for the second
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| /u-boot/doc/device-tree-bindings/misc/ |
| A D | intel,irq-router.txt | 24 The second cell is the total number of PIRQ links the router supports.
27 number (0 for PIRQA, 1 for PIRQB, etc). The second cell is the PIRQ routing
36 The second cell is the PCI interrupt pin used by this device. The last cell
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| /u-boot/board/gdsys/mpc8308/ |
| A D | Kconfig | 29 The base address of the second FPGA's register map.
34 The base address of the second FPGA's register map.
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| /u-boot/doc/device-tree-bindings/pwm/ |
| A D | tegra20-pwm.txt | 9 first cell specifies the per-chip index of the PWM to use and the second
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| /u-boot/doc/usage/ |
| A D | addrmap.rst | 34 The second column indicates the physical address.
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| A D | sbi.rst | 43 The second line indicates the implementation.
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| /u-boot/arch/x86/lib/ |
| A D | crt0_ia32_efi.S | 28 pushl %ebx # pass _DYNAMIC as second argument
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| /u-boot/arch/xtensa/dts/ |
| A D | xtfpga.dtsi | 31 * two cells: second cell == 0: internal irq number
32 * second cell == 1: external irq number
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| /u-boot/board/phytec/pfla02/ |
| A D | README | 20 as second option.
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| /u-boot/doc/device-tree-bindings/ata/ |
| A D | intel-sata.txt | 14 bit 1=enable second port, etc.
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| /u-boot/arch/powerpc/cpu/mpc8xx/ |
| A D | immap.c | 98 int i, second = (counter++ % 2); in binary() local
100 if (second) in binary()
114 if (second) in binary()
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| /u-boot/doc/uImage.FIT/ |
| A D | verified-boot.txt | 74 It is also possible to extend this scheme to a second level, like this:
78 2. Secondary private key is created and used to sign second-stage images.
81 use the secondary public key in the first-stage image to verify the second-
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| /u-boot/doc/ |
| A D | README.SNTP | 8 set local time to RTC, set the offset in second from UTC to the
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| /u-boot/drivers/clk/at91/ |
| A D | Kconfig | 53 driver. Some peripherals may need a second clock source
54 that may be different from the system clock. This second
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| /u-boot/doc/device-tree-bindings/sound/ |
| A D | snow.txt | 18 string) and the second entry must be the phandle of the HDMI IP block node
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