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/u-boot/doc/arch/
A Darm64.rst35 4. Spin-table is used to wake up secondary processors. One location
37 for secondary processors. It must be ensured that the location is
38 accessible and zero immediately after secondary processor
41 of secondary processors to it and send event to wakeup secondary
/u-boot/doc/
A DREADME.mpc85xx-spin-table12 page translation for secondary cores to use this page of memory. Then 4KB
17 that secondary cores can see it.
19 When secondary cores boot up from 0xffff_f000 page, they only have one default
22 with WIMGE =0b00100. Now secondary cores can keep polling the spin table
A DREADME.mpc85xxcds58 The U-Boot commands for copying the boot-bank into the secondary bank are
66 it into the secondary bank:
89 secondary bank as the boot-bank.
111 the "flinfo" command. The secondary bank is always FF00_0000.
A DREADME.davinci39 For DA850 an SPL (secondary program loader, see doc/README.SPL) is provided
A DREADME.SPL7 To unify all existing implementations for a secondary program loader (SPL)
/u-boot/arch/arm/mach-mediatek/mt7629/
A Dlowlevel_init.S55 b secondary
61 secondary: label
/u-boot/arch/arm/dts/
A Dsocfpga_arria5.dtsi7 /* First 4KB has trampoline code for secondary cores. */
A Dsocfpga_cyclone5.dtsi7 /* First 4KB has trampoline code for secondary cores. */
A Dkeystone-k2e-netcp.dtsi151 secondary-slave-ports {
A Dkeystone-k2l-netcp.dtsi150 secondary-slave-ports {
A Dkeystone-k2hk-netcp.dtsi169 secondary-slave-ports {
/u-boot/test/
A Dnokia_rx51_test.sh207 ./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k u-boot.bin -m rx51 -o mtd_uboot.img
211 ./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k combined.bin -r ubi.img -m rx51 -o mtd_r…
215 ./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k u-boot.bin -r ubi.img -m rx51 -o mtd_emm…
221 ./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k combined_hack.bin -r ubi.img -m rx51 -p …
/u-boot/doc/device-tree-bindings/clock/
A Dst,stm32-rcc.txt35 The secondary index is the bit number within the RCC register bank, starting
65 The secondary index is bound with the following magic numbers:
/u-boot/doc/mvebu/
A Darmada-8k-memory.txt7 a single CP configuration, then all secondary-CP mappings are invalid.
/u-boot/doc/uImage.FIT/
A Dverified-boot.txt18 It is also possible to add a secondary signed firmware image, in read-write
81 use the secondary public key in the first-stage image to verify the second-
/u-boot/drivers/video/imx/
A Dipu.h28 struct clk *secondary; member
/u-boot/arch/arm/cpu/armv8/
A DKconfig44 - Bring secondary CPUs into U-Boot proper in a board specific
46 secondary CPUs will spin in unprotected memory area because the
/u-boot/doc/board/microchip/
A Dmpfs_icicle.rst103 …in: {exec-addr: '0x80200000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, sec…
180 …in: {exec-addr: '0x80000000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, sec…
343 [ 0.006901] smp: Bringing up secondary CPUs ...
596 [ 0.052813] smp: Bringing up secondary CPUs ...
/u-boot/arch/arm/cpu/armv7/ls102xa/
A Dpsci.S181 @ Set secondary boot entry
/u-boot/arch/arm/mach-k3/
A DKconfig56 is booted up by primary boot media or secondary boot media.
/u-boot/doc/uefi/
A Discsi.rst55 secondary boot script via HTTPS or open a shell.
/u-boot/board/davinci/da8xxevm/
A DREADME.da85011 the secondary program loader (SPL). The SPL will initialize the system
/u-boot/arch/riscv/
A DKconfig234 bring up secondary harts one by one afterwards.
/u-boot/arch/arm/mach-bcm283x/
A DKconfig138 quiesce secondary SMP CPUs. This is not currently true in 64-bit
/u-boot/drivers/timer/
A DKconfig204 The only exception is when U-Boot is used as a secondary bootloader,

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