Home
last modified time | relevance | path

Searched refs:set_val (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/mmc/
A Ddavinci_mmc.c58 set_val(&regs->mmcclk, 0);
192 set_val(&regs->mmcim, 0);
199 set_val(&regs->mmcfifoctl,
208 set_val(&regs->mmcfifoctl,
214 set_val(&regs->mmctod, 0xFFFF);
224 set_val(&regs->mmcdxr, val);
230 set_val(&regs->mmcblen, 0);
231 set_val(&regs->mmcnblk, 0);
234 set_val(&regs->mmctor, 0x1FFF);
363 set_val(&regs->mmcclk, 0x0);
[all …]
/u-boot/arch/mips/mach-ath79/qca956x/
A Dclk.c186 static inline void set_val(u32 _reg, u32 _mask, u32 _val) in set_val() function
194 set_val(QCA956X_PLL_CPU_CONFIG_REG, _mask, _val)
197 set_val(QCA956X_PLL_DDR_CONFIG_REG, _mask, _val)
200 set_val(QCA956X_PLL_CLK_CTRL_REG, _mask, _val)
260 set_val(QCA956X_PLL_CPU_CONFIG1_REG, CPU_PLL_CONFIG1_NINT_MASK, \ in qca956x_pll_init()
268 set_val(QCA956X_PLL_DDR_CONFIG1_REG, DDR_PLL_CONFIG1_NINT_MASK, in qca956x_pll_init()

Completed in 5 milliseconds