| /u-boot/board/gdsys/p1022/ |
| A D | controlcenterd.c | 85 setbits_be32(&gur->pmuxcr, 0x00001000); in board_early_init_f()
88 setbits_be32(&gur->pmuxcr, 0x00000010); in board_early_init_f()
91 setbits_be32(&gur->pmuxcr, 0x00000020); in board_early_init_f()
94 setbits_be32(&gur->pmuxcr, 0x000000c0); in board_early_init_f()
97 setbits_be32(&gur->pmuxcr2, 0x03000000); in board_early_init_f()
103 setbits_be32(&gur->pmuxcr, 0x000000F0); in board_early_init_f()
115 setbits_be32(&pgpio->gpdir, 0x00200000); in board_early_init_f()
118 setbits_be32(&pgpio->gpdat, 0x00200000); in board_early_init_f()
126 setbits_be32(&pgpio->gpdir, 0x00100000); in board_early_init_f()
132 setbits_be32(&pgpio->gpdir, 0x00000400); in board_early_init_f()
[all …]
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| /u-boot/board/freescale/p1_p2_rdb_pc/ |
| A D | p1_p2_rdb_pc.c | 120 setbits_be32(&pgpio->gpdir, 0x02130000); in board_gpio_init()
123 setbits_be32(&pgpio->gpdir, 0x00200000); in board_gpio_init()
124 setbits_be32(&pgpio->gpodr, 0x00200000); in board_gpio_init()
127 setbits_be32(&pgpio->gpdat, 0x00200000); in board_gpio_init()
134 setbits_be32(&pgpio->gpdir, 0x00080000); in board_gpio_init()
135 setbits_be32(&pgpio->gpdat, 0x00080000); in board_gpio_init()
140 setbits_be32(&pgpio->gpdir, 0x00040000); in board_gpio_init()
141 setbits_be32(&pgpio->gpdat, 0x00040000); in board_gpio_init()
150 setbits_be32(&gur->pmuxcr, in board_early_init_f()
336 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE0); in board_eth_init()
[all …]
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| /u-boot/arch/arm/cpu/armv7/ls102xa/ |
| A D | ls102xa_psci.c | 127 setbits_be32(&scfg->hrstcr, 0x80000000); in ls1_start_fsm()
130 setbits_be32(&ddr->sdram_cfg_2, 0x80000000); in ls1_start_fsm()
143 setbits_be32(dcsr_epu_base + EPGCR, 0x80000000); in ls1_start_fsm()
146 setbits_be32(dcsr_epu_base + EPECR15, 0x90000004); in ls1_start_fsm()
176 setbits_be32(&rcpm->clpcl10setr, RCPM_CLPCL10SETR_C0); in ls1_deep_sleep()
200 setbits_be32(&scfg->dpslpcr, SCFG_DPSLPCR_WDRR_EN); in ls1_deep_sleep()
201 setbits_be32(&gur->crstsr, DCFG_CRSTSR_WDRFR); in ls1_deep_sleep()
204 setbits_be32(&gur->devdisr, CCSR_DEVDISR1_QE); in ls1_deep_sleep()
233 setbits_be32(&rcpm->powmgtcsr, RCPM_POWMGTCSR_LPM20_REQ); in ls1_sleep()
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| /u-boot/board/varisys/cyrus/ |
| A D | cyrus.c | 50 setbits_be32(&gur->ddrclkdr, 0x001B001B); in board_early_init_f()
53 setbits_be32(&pgpio->gpdat, GPIO_INITIAL); in board_early_init_f()
54 setbits_be32(&pgpio->gpodr, GPIO_OPENDRAIN); in board_early_init_f()
57 setbits_be32(&pgpio->gpdir, GPIO_DIR); in board_early_init_f()
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| /u-boot/board/freescale/m5275evb/ |
| A D | m5275evb.c | 49 setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL); in dram_init()
55 setbits_be32(&sdp->sdmr, in dram_init()
68 setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL); in dram_init()
73 setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IREF); in dram_init()
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| /u-boot/arch/powerpc/cpu/mpc85xx/ |
| A D | cpu_init.c | 75 setbits_be32(&usb_phy->pllprg[1], in usb_single_source_clk_configure()
116 setbits_be32(&usb_phy->config1, in fsl_erratum_a006261_workaround()
118 setbits_be32(&usb_phy->config2, in fsl_erratum_a006261_workaround()
318 setbits_be32(&cpc->cpchdbcr0, in enable_cpc()
413 setbits_be32(plldadcr1, 0x02000001); in fsl_erratum_a007212_workaround()
415 setbits_be32(plldadcr2, 0x02000001); in fsl_erratum_a007212_workaround()
417 setbits_be32(plldadcr3, 0x02000001); in fsl_erratum_a007212_workaround()
420 setbits_be32(dpdovrcr4, 0xe0000000); in fsl_erratum_a007212_workaround()
873 setbits_be32(p, 1 << (31 - 14)); in cpu_init_r()
924 setbits_be32(&dcfg->ecccr1, in cpu_init_r()
[all …]
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| /u-boot/drivers/net/ |
| A D | mpc8xx_fec.c | 309 setbits_be32(&immr->im_cpm.cp_cptr, mask); in fec_10Mbps()
343 setbits_be32(&fecp->fec_r_cntrl, FEC_RCNTRL_DRT); in fec_half_duplex()
384 setbits_be32(&immr->im_cpm.cp_pbpar, 0x00001001); in fec_pin_init()
390 setbits_be32(&immr->im_cpm.cp_pepar, 0x00000003); in fec_pin_init()
391 setbits_be32(&immr->im_cpm.cp_pedir, 0x00000003); in fec_pin_init()
406 setbits_be32(&immr->im_cpm.cp_pbpar, 0x00000001); in fec_pin_init()
409 setbits_be32(&immr->im_cpm.cp_cptr, 0x00000100); in fec_pin_init()
438 setbits_be32(&immr->im_ioport.utmode, 0x80); in fec_pin_init()
452 setbits_be32(&immr->im_cpm.cp_peso, 0x00037800); in fec_pin_init()
464 setbits_be32(&immr->im_cpm.cp_peso, 0x00031000); in fec_pin_init()
[all …]
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| /u-boot/arch/m68k/cpu/mcf5227x/ |
| A D | interrupts.c | 22 setbits_be32(&intp->imrh0, 0xffffffff); in interrupt_init()
23 setbits_be32(&intp->imrl0, 0xffffffff); in interrupt_init()
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| /u-boot/arch/m68k/cpu/mcf532x/ |
| A D | interrupts.c | 19 setbits_be32(&intp->imrh0, 0xffffffff); in interrupt_init()
20 setbits_be32(&intp->imrl0, 0xffffffff); in interrupt_init()
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| /u-boot/arch/m68k/cpu/mcf5445x/ |
| A D | interrupts.c | 22 setbits_be32(&intp->imrh0, 0xffffffff); in interrupt_init()
23 setbits_be32(&intp->imrl0, 0xffffffff); in interrupt_init()
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| /u-boot/arch/m68k/cpu/mcf547x_8x/ |
| A D | interrupts.c | 19 setbits_be32(&intp->imrh0, 0xffffffff); in interrupt_init()
20 setbits_be32(&intp->imrl0, 0xffffffff); in interrupt_init()
|
| A D | slicetimer.c | 48 setbits_be32(&timerp->sr, SLT_SR_ST); in __udelay()
58 setbits_be32(&timerp->sr, SLT_SR_ST); in dtimer_interrupt()
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| /u-boot/board/freescale/m5235evb/ |
| A D | m5235evb.c | 75 setbits_be32(&sdram->dacr0, SDRAMC_DARCn_IP); in dram_init()
86 setbits_be32(&sdram->dacr0, SDRAMC_DARCn_RE); in dram_init()
94 setbits_be32(&sdram->dacr0, SDRAMC_DARCn_IMRS); in dram_init()
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| /u-boot/board/freescale/ls1012afrdm/ |
| A D | eth.c | 35 setbits_be32(&pgpio->gpdir, MASK_ETH_PHY_RST); in ls1012afrdm_reset_phy()
38 setbits_be32(&pgpio->gpdat, val & ~MASK_ETH_PHY_RST); in ls1012afrdm_reset_phy()
42 setbits_be32(&pgpio->gpdat, val | MASK_ETH_PHY_RST); in ls1012afrdm_reset_phy()
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| /u-boot/arch/powerpc/cpu/mpc8xx/ |
| A D | interrupts.c | 132 setbits_be32(&immr->im_cpic.cpic_cisr, 1 << vec); in cpm_interrupt()
161 setbits_be32(&immr->im_cpic.cpic_cimr, 1 << vec); in irq_install_handler()
169 setbits_be32(&immr->im_siu_conf.sc_simask, 1 << (31 - vec)); in irq_install_handler()
213 setbits_be32(&immr->im_cpic.cpic_cicr, CICR_IEN); in cpm_interrupt_init()
249 setbits_be32(&immr->im_clkrst.car_plprcr, 0); in timer_interrupt_cpu()
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| /u-boot/board/ve8313/ |
| A D | ve8313.c | 83 setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN); in fixed_sdram()
130 setbits_be32(&gpio->dat, VE8313_WDT_EN | VE8313_WDT_TRIG); in board_early_init_f()
133 setbits_be32(&gpio->dir, VE8313_WDT_EN | VE8313_WDT_TRIG); in board_early_init_f()
149 setbits_be32(&gpio->dat, VE8313_WDT_TRIG); in hw_watchdog_reset()
184 setbits_be32(&clk->occr, 0xe0000000); in pci_init_board()
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| /u-boot/board/esd/vme8349/ |
| A D | pci.c | 87 setbits_be32(&immr->gpio[1].dir, GPIO2_TSI_PLL_RESET_N | in pci_init_board()
93 setbits_be32(&immr->gpio[1].dat, GPIO2_TSI_PLL_RESET_N); in pci_init_board()
95 setbits_be32(&immr->gpio[1].dat, GPIO2_TSI_POWERUP_RESET_N); in pci_init_board()
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| /u-boot/arch/powerpc/cpu/mpc8xxx/ |
| A D | srio.c | 122 setbits_be32((void *)&srio_regs->lp_serial in srio_erratum_a004034()
129 setbits_be32((void *)&srio_regs->impl.port[port].pcr, in srio_erratum_a004034()
168 setbits_be32(&srds_regs->lane[idx].gcr0, in srio_erratum_a004034()
278 setbits_be32(devdisr, _DEVDISR_SRIO1); in srio_init()
280 setbits_be32(devdisr, _DEVDISR_SRIO2); in srio_init()
285 setbits_be32(devdisr, _DEVDISR_SRIO1); in srio_init()
286 setbits_be32(devdisr, _DEVDISR_SRIO2); in srio_init()
287 setbits_be32(devdisr, _DEVDISR_RMU); in srio_init()
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| /u-boot/drivers/phy/ |
| A D | bcm6318-usbh-phy.c | 52 setbits_be32(priv->regs + USBH_PLL_REG, USBH_PLL_SUSP_EN); in bcm6318_usbh_init()
60 setbits_be32(priv->regs + USBH_SETUP_REG, USBH_SETUP_IOC); in bcm6318_usbh_init()
66 setbits_be32(priv->regs + USBH_SIM_REG, USBH_SIM_LADDR); in bcm6318_usbh_init()
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| /u-boot/arch/mips/mach-ath79/ |
| A D | reset.c | 82 setbits_be32(base + reg, AR71XX_RESET_FULL_CHIP); in _machine_restart()
136 setbits_be32(rregs + AR933X_RESET_REG_RESET_MODULE, mask); in eth_init_ar933x()
169 setbits_be32(rregs + AR934X_RESET_REG_RESET_MODULE, mask); in eth_init_ar934x()
188 setbits_be32(rregs + AR934X_RESET_REG_RESET_MODULE, mask); in eth_init_qca953x()
257 setbits_be32(rregs + QCA956X_RESET_REG_RESET_MODULE, mask); in qca956x_sgmii_cal()
332 setbits_be32(rregs + QCA956X_RESET_REG_RESET_MODULE, mask); in qca956x_s17_reset()
361 setbits_be32(rregs + QCA956X_RESET_REG_RESET_MODULE, mask); in qca956x_init_mdio()
447 setbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE, in usb_reset_ar933x()
463 setbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE, in usb_reset_ar934x()
489 setbits_be32(reset_regs + QCA953X_RESET_REG_RESET_MODULE, in usb_reset_qca953x()
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| /u-boot/board/freescale/mpc8308rdb/ |
| A D | mpc8308rdb.c | 50 setbits_be32(&immr->gpio[0].dat, SPI_CS_MASK); in spi_cs_deactivate()
149 setbits_be32(&immr->gpio[0].dir, SPI_CS_MASK); in misc_init_r()
150 setbits_be32(&immr->gpio[0].dat, SPI_CS_MASK); in misc_init_r()
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| /u-boot/drivers/ddr/fsl/ |
| A D | mpc85xx_ddr_gen3.c | 403 setbits_be32(&ddr->debug[0], 1); in fsl_ddr_set_memctl_regs()
414 setbits_be32(&ecm->eebacr, 0x10000000); in fsl_ddr_set_memctl_regs()
418 setbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_D_INIT); in fsl_ddr_set_memctl_regs()
423 setbits_be32(&ddr->debug[2], 0x400); in fsl_ddr_set_memctl_regs()
440 setbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR); in fsl_ddr_set_memctl_regs()
509 setbits_be32(&ddr->debug[0], 0x10000); in fsl_ddr_set_memctl_regs()
526 setbits_be32(&ddr->debug[1], 0x800); in fsl_ddr_set_memctl_regs()
538 setbits_be32(&ddr->sdram_cfg_2, in fsl_ddr_set_memctl_regs()
544 setbits_be32(&ddr->debug[1], 0x400); in fsl_ddr_set_memctl_regs()
556 setbits_be32(&ddr->sdram_cfg_2, in fsl_ddr_set_memctl_regs()
[all …]
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| /u-boot/arch/m68k/cpu/mcf52x2/ |
| A D | interrupts.c | 43 setbits_be32(&intp->int_icr1, CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
59 setbits_be32(&intp->imrl0, 0x1); in interrupt_init()
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| /u-boot/drivers/spi/ |
| A D | mpc8xxx_spi.c | 93 setbits_be32(&spi->mode, (8 - 1) << SPI_MODE_LEN_SHIFT); in mpc8xxx_spi_probe()
95 setbits_be32(&spi->mode, SPI_MODE_EN); in mpc8xxx_spi_probe()
98 setbits_be32(&priv->spi->event, 0xffffffff); in mpc8xxx_spi_probe()
150 setbits_be32(&spi->event, 0xffffffff); in mpc8xxx_spi_xfer()
180 setbits_be32(&spi->event, SPI_EV_NE); in mpc8xxx_spi_xfer()
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| /u-boot/drivers/misc/ |
| A D | mpc83xx_serdes.c | 41 setbits_be32(&priv->regs->srdsrstctl, SRDSRSTCTL_SATA_RESET); in setup_sata()
77 setbits_be32(&priv->regs->srdscr1, SRDSCR1_PLLBW); in setup_pex()
171 setbits_be32(&priv->regs->srdsrstctl, SRDSRSTCTL_RST); in mpc83xx_serdes_probe()
|