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/u-boot/arch/arm/mach-rmobile/
A Dpfc-r8a7790.h15 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
16 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
20 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
25 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
38 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
39 PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \
40 PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \
41 PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx)
65 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
73 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
[all …]
A Dpfc-sh73a0.c27 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
28 PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx), \
29 PORT_10(fn, pfx##4, sfx), PORT_10(fn, pfx##5, sfx), \
30 PORT_10(fn, pfx##6, sfx), PORT_10(fn, pfx##7, sfx), \
31 PORT_10(fn, pfx##8, sfx), PORT_10(fn, pfx##9, sfx), \
33 PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
34 PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
35 PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
36 PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
38 PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
[all …]
A Dpfc-r8a7740.c26 #define CPU_ALL_PORT(fn, pfx, sfx) \ argument
27 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
28 PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \
29 PORT_10(fn, pfx##20, sfx), \
30 PORT_1(fn, pfx##210, sfx), PORT_1(fn, pfx##211, sfx)
/u-boot/drivers/pinctrl/renesas/
A Dsh_pfc.h542 PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \
543 PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \
544 PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \
545 PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \
546 PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \
547 PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \
557 PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx)
560 #define _GP_ALL(bank, pin, name, sfx, cfg) name##_##sfx argument
581 #define PORT_1(pn, fn, pfx, sfx) fn(pn, pfx, sfx) argument
588 PORT_1(pn+8, fn, pfx##8, sfx), PORT_1(pn+9, fn, pfx##9, sfx)
[all …]
A Dpfc-r8a7792.c18 PORT_GP_29(0, fn, sfx), \
19 PORT_GP_23(1, fn, sfx), \
20 PORT_GP_32(2, fn, sfx), \
21 PORT_GP_28(3, fn, sfx), \
22 PORT_GP_17(4, fn, sfx), \
23 PORT_GP_17(5, fn, sfx), \
24 PORT_GP_17(6, fn, sfx), \
25 PORT_GP_17(7, fn, sfx), \
26 PORT_GP_17(8, fn, sfx), \
27 PORT_GP_17(9, fn, sfx), \
[all …]
A Dpfc-r8a77990.c26 #define CPU_ALL_PORT(fn, sfx) \ argument
27 PORT_GP_CFG_18(0, fn, sfx, CFG_FLAGS), \
28 PORT_GP_CFG_23(1, fn, sfx, CFG_FLAGS), \
29 PORT_GP_CFG_26(2, fn, sfx, CFG_FLAGS), \
31 PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \
32 PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS), \
33 PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS), \
34 PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \
36 PORT_GP_CFG_20(5, fn, sfx, CFG_FLAGS), \
37 PORT_GP_CFG_9(6, fn, sfx, CFG_FLAGS), \
[all …]
A Dpfc-r8a7791.c22 PORT_GP_32(0, fn, sfx), \
23 PORT_GP_26(1, fn, sfx), \
24 PORT_GP_32(2, fn, sfx), \
25 PORT_GP_32(3, fn, sfx), \
26 PORT_GP_32(4, fn, sfx), \
27 PORT_GP_32(5, fn, sfx), \
29 PORT_GP_1(6, 24, fn, sfx), \
30 PORT_GP_1(6, 25, fn, sfx), \
31 PORT_GP_1(6, 26, fn, sfx), \
32 PORT_GP_1(6, 27, fn, sfx), \
[all …]
A Dpfc-r8a77970.c23 #define CPU_ALL_PORT(fn, sfx) \ argument
24 PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
25 PORT_GP_28(1, fn, sfx), \
26 PORT_GP_CFG_17(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
27 PORT_GP_CFG_17(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
28 PORT_GP_6(4, fn, sfx), \
29 PORT_GP_15(5, fn, sfx)
A Dpfc-r8a77995.c22 #define CPU_ALL_PORT(fn, sfx) \ argument
23 PORT_GP_9(0, fn, sfx), \
24 PORT_GP_32(1, fn, sfx), \
25 PORT_GP_32(2, fn, sfx), \
26 PORT_GP_CFG_10(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
27 PORT_GP_32(4, fn, sfx), \
28 PORT_GP_21(5, fn, sfx), \
29 PORT_GP_14(6, fn, sfx)
A Dpfc-r8a77980.c23 #define CPU_ALL_PORT(fn, sfx) \ argument
24 PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
25 PORT_GP_28(1, fn, sfx), \
26 PORT_GP_CFG_30(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
27 PORT_GP_CFG_17(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
28 PORT_GP_25(4, fn, sfx), \
29 PORT_GP_15(5, fn, sfx)
A Dpfc-r8a7794.c18 #define CPU_ALL_PORT(fn, sfx) \ argument
19 PORT_GP_32(0, fn, sfx), \
20 PORT_GP_26(1, fn, sfx), \
21 PORT_GP_32(2, fn, sfx), \
22 PORT_GP_32(3, fn, sfx), \
23 PORT_GP_32(4, fn, sfx), \
24 PORT_GP_28(5, fn, sfx), \
25 PORT_GP_CFG_24(6, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
26 PORT_GP_1(6, 24, fn, sfx), \
27 PORT_GP_1(6, 25, fn, sfx)
A Dpfc-r8a7795.c20 #define CPU_ALL_PORT(fn, sfx) \ argument
21 PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \
22 PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \
23 PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \
25 PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \
26 PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS), \
27 PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS), \
28 PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \
30 PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \
31 PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \
[all …]
A Dpfc-r8a7796.c26 #define CPU_ALL_PORT(fn, sfx) \ argument
27 PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \
28 PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \
29 PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \
31 PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \
32 PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS), \
33 PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS), \
34 PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \
36 PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \
37 PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \
[all …]
A Dpfc-r8a77965.c27 #define CPU_ALL_PORT(fn, sfx) \ argument
28 PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \
29 PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \
30 PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \
32 PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \
33 PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS), \
34 PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS), \
35 PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \
37 PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \
38 PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \
[all …]
A Dpfc-r8a7790.c23 #define CPU_ALL_PORT(fn, sfx) \ argument
24 PORT_GP_32(0, fn, sfx), \
25 PORT_GP_30(1, fn, sfx), \
26 PORT_GP_30(2, fn, sfx), \
27 PORT_GP_CFG_32(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
28 PORT_GP_32(4, fn, sfx), \
29 PORT_GP_32(5, fn, sfx)
/u-boot/include/
A Dsh_pfc.h118 #define PORT_1(fn, pfx, sfx) fn(pfx, sfx) argument
121 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
122 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
123 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
124 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
125 PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
128 PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
129 PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
130 PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
131 PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
[all …]
A Dcompiler.h79 #define _uswap_64(x, sfx) \ argument
80 ((((x) & 0xff00000000000000##sfx) >> 56) | \
81 (((x) & 0x00ff000000000000##sfx) >> 40) | \
82 (((x) & 0x0000ff0000000000##sfx) >> 24) | \
83 (((x) & 0x000000ff00000000##sfx) >> 8) | \
84 (((x) & 0x00000000ff000000##sfx) << 8) | \
85 (((x) & 0x0000000000ff0000##sfx) << 24) | \
86 (((x) & 0x000000000000ff00##sfx) << 40) | \
87 (((x) & 0x00000000000000ff##sfx) << 56))
A Dwait_bit.h37 #define BUILD_WAIT_FOR_BIT(sfx, type, read) \ argument
39 static inline int wait_for_bit_##sfx(const void *reg, \
/u-boot/arch/mips/include/asm/
A Dio.h507 #define __BUILD_CLRBITS(bwlq, sfx, end, type) \ argument
509 static inline void clrbits_##sfx(volatile void __iomem *mem, type clr) \
518 #define __BUILD_SETBITS(bwlq, sfx, end, type) \ argument
520 static inline void setbits_##sfx(volatile void __iomem *mem, type set) \
529 #define __BUILD_CLRSETBITS(bwlq, sfx, end, type) \ argument
531 static inline void clrsetbits_##sfx(volatile void __iomem *mem, \
542 #define BUILD_CLRSETBITS(bwlq, sfx, end, type) \ argument
544 __BUILD_CLRBITS(bwlq, sfx, end, type) \
545 __BUILD_SETBITS(bwlq, sfx, end, type) \
546 __BUILD_CLRSETBITS(bwlq, sfx, end, type)
/u-boot/scripts/
A DMakefile.build406 intermediate_targets = $(foreach sfx, $(2), \
407 $(patsubst %$(strip $(1)),%$(sfx), \
/u-boot/
A D.azure-pipelines.yml19 …/msys2/msys2-installer/releases/download/2020-07-20/msys2-base-x86_64-20200720.sfx.exe", "sfx.exe")
22 sfx.exe -y -o%CD:~0,2%\

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